SDAA129 September 2025 TCAN2410-Q1 , TCAN2411-Q1 , TCAN2450-Q1 , TCAN2451-Q1 , TCAN2845-Q1 , TCAN2847-Q1 , TCAN2855-Q1 , TCAN2857-Q1
With a basic understanding of what channel expansion is, the next pressing question is how to implement channel expansion using TI SBCs with a GFO pin.
GFO is an acronym for general field output – for example, a generic function pin. Think of this pin as a GPIO pin without the ability to take inputs (for example, such as a GPO pin). This is a digital output pin that can output a high or low signal with the voltage domain referenced to the primary power source on the SBC (denoted VCC1 - which is 3.3V or 5V depending on specific device and use case). The GFO pin has two overarching functions depending on application, the first being a general digital output that is controlled through the SPI bus. The second function is a status flag allowing for certain interrupts to not only trigger the nINT pin but also the GFO pin.
The first category (general digital output) is the main focus on with respect to channel expansion. Remember that channel expansion using the GFO pin essentially means moving the control path to the external transceiver from the MCU to the SBC. So instead of using a GPIO pin to control the inhibit and/or enable pins on an external transceiver, designers can save an MCU GPIO pin and use the GFO pin on the SBC instead. This is beneficial as it reduces the resources needed on the MCU side to facilitate transceiver channel expansion. This is also a resourceful use case because the SPI connection from the MCU to the SBC exist regardless of whether the GFO pin is used or not, so the designer is not adding any additional hardware resources to implement this type of design.
There are two minor considerations when using the GFO pin for channel expansion: what are the requirements of GFO for sinking and sourcing current; and is there any fault that needs to be on GFO in addition to nINT.
The first consideration is the current sinking and sourcing ability of the GFO pin. The pin is a push-pull output that is recommended to source no more than 2mA and sink no more than 2mA – so the overall drive strength of this pin is low. In cases where only one additional communication channel is needed, this limit is usually not an issue (digital high impedance inputs should draw low current). However if multiple channels are added, the lower drive strength may prove to be less than ideal. In those cases, it may be worth while to look to a high-speed buffer, however most applications are fine with just the GFO pin.
The other consideration is if the application work without alt. GFO functionality. Hardware interrupts are indicated through the nINT pin – but for more granular details, the interrupt registers must be read first, which is not always preferred depending on application. The GFO pin has alt functions that can be used to flag issues with one of the following: Power supply interrupt, WD interrupt, Local Wake Up (LWU), Bus Wake request (WUP), restart counter overflow (indicated in standby), or a CAN bus fault. These alt functions can be required if the time allowed to address one of the aforementioned issues through the traditional nINT -> read interrupt registers -> take appropriate action is too long for system requirements and the GFO -> Read specific register of indicated problem -> take appropriate action meets the needs of the timing in application (This can be quicker as no iterating through registers would be required). The previously listed concern is not a problem in the vast majority of applications, but it is something that must be taken into consideration during the application design process.