ZHCS212C April 2011 – March 2019 UCD90120A
PRODUCTION DATA.
- 1 特性
- 2 應(yīng)用
- 3 說明
- 4 修訂歷史記錄
- 5 Pin Configuration and Functions
- 6 Specifications
-
7 Detailed Description
- 7.1 Overview
- 7.2 Functional Block Diagram
- 7.3 Feature Description
- 7.4
Device Functional Modes
- 7.4.1 Power-Supply Sequencing
- 7.4.2 Pin-Selected Rail States
- 7.4.3 Monitoring
- 7.4.4 Fault Responses and Alert Processing
- 7.4.5 Shut Down All Rails and Sequence On (Resequence)
- 7.4.6 GPIOs
- 7.4.7 GPO Control
- 7.4.8 GPO Dependencies
- 7.4.9 GPO Delays
- 7.4.10 State Machine Mode Enable
- 7.4.11 GPI Special Functions
- 7.4.12 Power-Supply Enables
- 7.4.13 Cascading Multiple Devices
- 7.4.14 PWM Outputs
- 7.4.15 Programmable Multiphase PWMs
- 7.4.16 Margining
- 7.4.17 System Reset Signal
- 7.4.18 Watch Dog Timer
- 7.4.19 Run Time Clock
- 7.4.20 Data and Error Logging to Flash Memory
- 7.4.21 Brownout Function
- 7.4.22 PMBus Address Selection
- 7.5 Programming
- 8 Application and Implementation
- 9 Power Supply Recommendations
- 10Layout
- 11器件和文檔支持
- 12機(jī)械、封裝和可訂購(gòu)信息
封裝選項(xiàng)
機(jī)械數(shù)據(jù) (封裝 | 引腳)
- RGC|64
散熱焊盤機(jī)械數(shù)據(jù) (封裝 | 引腳)
- RGC|64
訂購(gòu)信息
7.4.16.2 Closed-Loop Margining
Closed-loop margining uses a PWM or FPWM output for each power supply that is being margined. An external RC network converts the FPWM pulse train into a DC margining voltage. The margining voltage is connected to the appropriate power-supply feedback node through a resistor. The power-supply output voltage is monitored, and the margining voltage is controlled by adjusting the PWM duty cycle until the power-supply output voltage reaches the margin-low and margin-high voltages set by the user. The voltage setting resolutions will be the same that applies to the voltage measurement resolution (Table 2). The closed loop margining can operate in several modes (Table 5). Given that this closed-loop system has feed back through the ADC, the closed-loop margining accuracy will be dominated by the ADC measurement. The relationship between duty cycle and margined voltage is configurable so that voltage increases when duty cylce increases or decreases. For more details on configuring the UCD90120A for margining, see the Voltage Margining Using the UCD9012x application note (SLVA375).
Table 5. Closed Loop Margining Modes
| MODE | DESCRIPTION |
|---|---|
| DISABLE | Margining is disabled. |
| ENABLE_TRI_STATE | When not margining, the PWM pin is set to high impedance state. |
| ENABLE_ACTIVE_TRIM | When not margining, the PWM duty-cycle is continuously adjusted to keep the voltage at VOUT_COMMAND. |
| ENABLE_FIXED_DUTY_CYCLE | When not margining, the PWM duty-cycle is set to a fixed duty-cycle. |
Figure 24. Closed-Loop Margining