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ZHCSDN7B March 2015 – May 2015 UCD7138

PRODUCTION DATA.

封裝選項(xiàng)

機(jī)械數(shù)據(jù) (封裝 | 引腳)

DRS|6
- MPDS176E

散熱焊盤機(jī)械數(shù)據(jù) (封裝 | 引腳)

訂購信息

7 Specifications

7.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted) ⁽¹⁾

		MIN	MAX	UNIT
Input voltage	V_CC	–0.3	20	V
	IN, CRTL	–0.3	3.8
	VD	–1	45
Maximum V_CC continuous input current	DC current		50	mA
Output current, peak (pulse)			6	A
Switching frequency, ƒ_S			2000	kHz
Operating junction temperature, T_J		–40	125	°C
Lead temperature, soldering, 10 s, T_(SOL)			300	°C
Storage temperature, T_stg		–65	150	°C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

7.2 ESD Ratings

			VALUE	UNIT
V_(ESD)	Electrostatic discharge	Human body model (HBM), per ANSI/ESDA/JEDEC JS–001, all pins⁽¹⁾	±2000	V
V_(ESD)	Electrostatic discharge	Charged device model (CDM), per JEDEC specification JESD22-C101, all pins⁽²⁾	±500	V

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

7.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

		MIN	MAX	UNIT
V_CC	V_CC input voltage from a low impedance source	4.5	18	V
V_IN	Input voltage	0	3.6	V
C_(BP)	V_CC bypass capacitor	1		µF
T_J	Operating junction temperature	–40	125	°C

7.4 Thermal Information

THERMAL METRIC⁽¹⁾		UCD7138	UNIT
		DRS (WSON)
		6 PINS
R_θJA	Junction-to-ambient thermal resistance	73.4	°C/W
R_θJC(top)	Junction-to-case (top) thermal resistance	84.2
R_θJB	Junction-to-board thermal resistance	46.3
ψ_JT	Junction-to-top characterization parameter	2.6
ψ_JB	Junction-to-board characterization parameter	46.4
R_θJC(bot)	Junction-to-case (bottom) thermal resistance	12.4

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

7.5 Electrical Characteristics

At V_CC = 12 V_DC, –40°C < T_J = T_A < 125°C, 1µF capacitor from V_CC to GND, all voltages are with respect to ground and currents are positive into and negative out of the specified terminal, unless otherwise noted. Typical values are at T_J = 25°C.

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
VCC BIAS SUPPLY
I_CC(UV)	V_CC current, undervoltage	V_CC = 3.4 V		122	186	µA
I_CC(ON)	V_CC current, no switching	V_CC = 12 V		0.85	1.1	mA
I_CC(OPERATE)	V_CC current, normal operation ⁽¹⁾	V_CC = 12 V, C_(LOAD) = 10 nF, ƒ = 100 kHz		13	17	mA
GATE INPUT (IN)
V_IH	Input signal high threshold		1.93	2.03	2.10	V
V_IL	Input signal low threshold		0.98	1.03	1.08	V
V_I(hys)	Input hysteresis		0.90	1.00		V
DTC OUTPUT
V_OL(DTC)	Low level output voltage				0.25	V
V_OH(DTC)	High level output voltage		2.5			V
I_OH(DTC)	Output sinking current				4	mA
I_OL(DTC)	Output sourcing current		–4			mA
V_DTC	Maximum DTC pin output voltage			3.5	3.6	V
UNDERVOLTAGE LOCKOUT SECTION (UVLO)
V_CC(ON)	V_CC turnon threshold		3.30	3.80	4.30	V
V_CC(OFF)	V_CC turnoff threshold		3.10	3.56	4.02	V
V_CC(hys)	UVLO hysteresis	V_CC(hys) = V_CC(ON) – V_CC(OFF)		0.24		V
COMPARATOR
V_TH	Body diode conduction sensing threshold		–179	–147	–113	mV
C_{I(VD–ground)}	Differential input capacitance between VD and ground ⁽¹⁾	V_D = –150 mV		20		pF
GATE DRIVER
V_CC-V_OH	Output high voltage	I_OUT= –10 mA		0.038	0.064	V
V_OL	Output low voltage	I_OUT = 10 mA		0.0025	0.009	V
R_(UP)	Pullup resistance	T_A = 25°C, I_OUT = –25 mA to –50 mA		5	6.1	Ω
R_(UP)	Pullup resistance	T_A = –40°C to 125°C, I_OUT = –50 mA		5	6.3	Ω
R_(DOWN)	Pulldown resistance	T_A = 25°C, I_OUT = 25 mA to 50 mA		0.31	0.44	Ω
R_(DOWN)	Pulldown resistance	T_A = –40°C to 125°C, I_OUT = 50 mA		0.33	0.45	Ω
I_O(source)	Output peak current (source) ⁽¹⁾	C_(LOAD) = 0.22 µF, ƒ_S = 1 kHz, 5-V output		–4		A
I_O(sink)	Output peak current (sink) ⁽¹⁾	C_(LOAD) = 0.22 µF, ƒ_S = 1 kHz, 5-V output		6		A

(1) Ensured by Design, not tested in Production.

7.6 Switching Characteristics

PARAMETER		TEST CONDITIONS	TYP	MAX	UNIT
t_r	Rise time	C_(LOAD) =1 nF, V_CC = 5 V, See Figure 1 and Figure 24	5	8	ns
t_r	Rise time	C_(LOAD) =1 nF, V_CC = 12 V, See Figure 1 and Figure 24	4	8	ns
t_f	Fall time	C_(LOAD)=1 nF, V_CC = 5 V, See Figure 1 and Figure 24	3.36	5	ns
t_f	Fall time	C_(LOAD)=1 nF, V_CC = 12 V, See Figure 1 and Figure 24	3.5	5	ns
t_w(VD)	Minimum VD pulse duration (width) that changes the DTC output state	V_CC = 5 V	10	23	ns
t_w(VD)		V_CC = 12 V	10	23	ns
t_w(IN)	Minimum IN duration (width) that changes OUT state	V_CC = 5 V	11	13	ns
t_w(IN)	Minimum IN duration (width) that changes OUT state	V_CC = 12 V	11	13	ns
t_d(1)	Gate driver turn on propagation delay	C_(LOAD) = 1 nF, V_IN = 0 V to 3.3 V, V_CC = 5 V, V_VD = –0.5 V, See Figure 1 and Figure 24	14	26.6	ns
t_d(1)	Gate driver turn on propagation delay	C_(LOAD) = 1 nF, V_IN = 0 V to 3.3 V, V_CC = 12 V, V_VD = –0.5 V, See Figure 1 and Figure 24	14	25	ns
t_d(2)	Gate driver turn off propagation delay	C_(LOAD) = 1 nF, V_IN = 3.3 V to 0 V, V_CC = 5 V, See Figure 1 and Figure 24	14	22.9	ns
t_d(2)	Gate driver turn off propagation delay	C_(LOAD) = 1 nF, V_IN = 3.3 V to 0 V, V_CC = 12 V, See Figure 1 and Figure 24	14	22	ns
t_d(COMP)	Body-diode conduction detection-comparator controlled-turnon propagation delay⁽¹⁾	C_(LOAD) = 1 nF, V_IN = 3.3 V, V_CC = 5 V, V_VD = 2 V to –0.5 V, See Figure 24	28	36	ns
t_d(COMP)		C_(LOAD) = 1 nF, V_IN = 3.3 V, V_CC = 12 V, V_VD = 2 V to –0.5 V, See Figure 24	26	33	ns
t_d(DTC)	DTC output propagation delay	V_CC = 5 V	21	27	ns
t_d(DTC)	DTC output propagation delay	V_CC = 12 V	18	25	ns