ZHCSKB9Q December 1999 – October 2019 UCC1895 , UCC2895 , UCC3895
PRODUCTION DATA.
- 1 特性
- 2 應用
- 3 說明
- 4 修訂歷史記錄
- 5 Pin Configuration and Functions
- 6 Specifications
-
7 Detailed Description
- 7.1 Overview
- 7.2 Functional Block Diagrams
- 7.3
Feature Description
- 7.3.1 ADS (Adaptive Delay Set)
- 7.3.2 CS (Current Sense)
- 7.3.3 CT (Oscillator Timing Capacitor)
- 7.3.4 DELAB and DELCD (Delay Programming Between Complementary Outputs)
- 7.3.5 EAOUT, EAP, and EAN (Error Amplifier)
- 7.3.6 OUTA, OUTB, OUTC, and OUTD (Output MOSFET Drivers)
- 7.3.7 PGND (Power Ground)
- 7.3.8 RAMP (Inverting Input of the PWM Comparator)
- 7.3.9 REF (Voltage Reference)
- 7.3.10 RT (Oscillator Timing Resistor)
- 7.3.11 GND (Analog Ground)
- 7.3.12 SS/DISB (Soft Start/Disable)
- 7.3.13 SYNC (Oscillator Synchronization)
- 7.3.14 VDD (Chip Supply)
- 7.4 Device Functional Modes
- 7.5 Programming
-
8 Application and Implementation
- 8.1 Application Information
- 8.2
Typical Application
- 8.2.1 Design Requirements
- 8.2.2
Detailed Design Procedure
- 8.2.2.1 Power Loss Budget
- 8.2.2.2 Preliminary Transformer Calculations (T1)
- 8.2.2.3 QA, QB, QC, QD FET Selection
- 8.2.2.4 Selecting LS
- 8.2.2.5 Selecting Diodes DB and DC
- 8.2.2.6 Output Inductor Selection (LOUT)
- 8.2.2.7 Output Capacitance (COUT)
- 8.2.2.8 Select Rectifier Diodes
- 8.2.2.9 Input Capacitance (CIN)
- 8.2.2.10 Current Sense Network (CT, RCS, RR, DA)
- 8.2.3 Application Curves
- 9 Power Supply Recommendations
- 10Layout
- 11器件和文檔支持
- 12機械、封裝和可訂購信息
封裝選項
機械數據 (封裝 | 引腳)
散熱焊盤機械數據 (封裝 | 引腳)
訂購信息
8.2.2.10 Current Sense Network (CT, RCS, RR, DA)
The CT chosen for this design has a turns ratio (CTRAT) of 100:1.
Calculate nominal peak current (IP1) at VINMIN:
Peak primary current:
The CS pin voltage where peak current limit will trip.
Calculate current sense resistor (RCS) and leave 300 mV for slope compensation. Include a 1.1 factor for margin:
Select a standard resistor for RCS:
Estimate power loss for RCS:
Calculate maximum reverse voltage (VDA) on DA:
Estimate DA power loss (PDA):
Calculate reset resistor RR:
Resistor RR is used to reset the current sense transformer CT.
Resistor RLF and capacitor CLF form a low pass filter for the current sense signal (Pin 15). For this design we chose the following values. This filter has a low frequency pole (fLFP) at 482 kHz. This should work for most applications but may be adjusted to suit individual layouts and EMI present in the design.
The UCC3895 REF output (Pin 4) needs a high frequency bypass capacitor to filter out high frequency noise. The maximum amount of capacitance allowed is given in the Recommended Operating Conditions.
The voltage amplifier reference voltage (Pin 2, EA+) can be set with a voltage divider (R1, R2), for this design example, the error amplifier reference voltage (V1) will be set to 2.5 V. Select a standard resistor value for R1 and then calculate resistor value R2.
UCC3895 reference voltage:
Set voltage amplifier reference voltage:
Voltage divider formed by resistor R3 and R4 are chosen to set the DC output voltage (VOUT) at Pin 3 (EA–).
Select a standard resistor for R3:
Calculate R4:
Then choose a standard resistor for R4:
