ZHCSHY7A April 2018 – May 2018 UCC28742
PRODUCTION DATA.
- 1 特性
- 2 應(yīng)用
- 3 說明
- 4 修訂歷史記錄
- 5 Pin Configuration and Functions
- 6 Specifications
-
7 Detailed Description
- 7.1 Overview
- 7.2 Functional Block Diagram
- 7.3 Feature Description
- 7.4 Device Functional Modes
-
8 Applications and Implementation
- 8.1 Application Information
- 8.2
Typical Application
- 8.2.1 Design Requirements
- 8.2.2
Detailed Design Procedure
- 8.2.2.1 Custom Design With WEBENCH® Tools
- 8.2.2.2 VDD Capacitance, CDD
- 8.2.2.3 VDD Start-Up Resistance, RSTR
- 8.2.2.4 Input Bulk Capacitance and Minimum Bulk Voltage
- 8.2.2.5 Transformer Turns Ratio, Inductance, Primary-Peak Current
- 8.2.2.6 Transformer Parameter Verification
- 8.2.2.7 VS Resistor Divider and Line Compensation
- 8.2.2.8 Standby Power Estimate
- 8.2.2.9 Output Capacitance
- 8.2.2.10 Feedback Loop Design Consideration
- 8.2.3 Application Curves
- 8.3 Do's and Don'ts
- 9 Power Supply Recommendations
- 10Layout
-
11器件和文檔支持
- 11.1
器件支持
- 11.1.1 開發(fā)支持
- 11.1.2
器件命名規(guī)則
- 11.1.2.1 電容術(shù)語(yǔ)（以法拉為單位）
- 11.1.2.2 占空比術(shù)語(yǔ)
- 11.1.2.3 頻率術(shù)語(yǔ)（以赫茲為單位）
- 11.1.2.4 電流術(shù)語(yǔ)（以安培為單位）
- 11.1.2.5 電流和電壓調(diào)節(jié)術(shù)語(yǔ)
- 11.1.2.6 變壓器術(shù)語(yǔ)
- 11.1.2.7 功率術(shù)語(yǔ)（以瓦特為單位）
- 11.1.2.8 電阻術(shù)語(yǔ)（以 Ω 為單位）
- 11.1.2.9 時(shí)序術(shù)語(yǔ)（以秒為單位）
- 11.1.2.10 電壓術(shù)語(yǔ)（以伏特為單位）
- 11.1.2.11 交流電壓術(shù)語(yǔ)（以 VRMS 為單位）
- 11.1.2.12 效率術(shù)語(yǔ)
- 11.2 文檔支持
- 11.3 接收文檔更新通知
- 11.4 社區(qū)資源
- 11.5 商標(biāo)
- 11.6 靜電放電警告
- 11.7 術(shù)語(yǔ)表
- 11.1
器件支持
- 12機(jī)械、封裝和可訂購(gòu)信息
封裝選項(xiàng)
機(jī)械數(shù)據(jù) (封裝 | 引腳)
- DBV|6
散熱焊盤機(jī)械數(shù)據(jù) (封裝 | 引腳)
訂購(gòu)信息
10.2 Layout Example
Figure 26 demonstrates a layout of 10-W, 5-V/2-A converter with trade-offs to minimize the loops while effectively placing components and tracks for low noise operation on a single-layer printed circuit board. In addition to the consideration of minimal loops, one another layout guideline is always to use the device GND as reference point. This applies to both power and signal to return to the device GND pin (pin 5).
Figure 26. Layout Example