ZHCSC62D March 2014 – December 2017 UCC28630 , UCC28631 , UCC28632 , UCC28633 , UCC28634
PRODUCTION DATA.
- 1 特性
- 2 應(yīng)用
- 3 說明
- 4 修訂歷史記錄
- 5 Device Comparison Table
- 6 Pin Configuration and Functions
- 7 Specifications
-
8 Detailed Description
- 8.1 Overview
- 8.2 Functional Block Diagram
- 8.3
Feature Description
- 8.3.1 High-Voltage Current Source Start-Up Operation
- 8.3.2 AC Input UVLO / Brownout Protection
- 8.3.3 Active X-Capacitor Discharge (UCC28630 and UCC28633 only)
- 8.3.4 Magnetic Input and Output Voltage Sensing
- 8.3.5 Fixed-Point Magnetic Sense Sampling Error Sources
- 8.3.6 Magnetic Sense Resistor Network Calculations
- 8.3.7 Magnetic Sensing: Power Stage Design Constraints
- 8.3.8 Magnetic Sense Voltage Control Loop
- 8.3.9 Peak Current Mode Control
- 8.3.10 IPEAK Adjust vs. Line
- 8.3.11 Primary-Side Constant-Current Limit (CC Mode)
- 8.3.12 Primary-Side Overload Timer (UCC28630 only)
- 8.3.13 Overload Timer Adjustment (UCC28630 only)
- 8.3.14 CC-Mode IOUT(lim) Adjustment
- 8.3.15 Fault Protections
- 8.3.16 Pin-Fault Detection and Protection
- 8.3.17 Over-Temperature Protection
- 8.3.18 External Fault Input
- 8.3.19 External SD Pin Wake Input (except UCC28633)
- 8.3.20 External Wake Input at VSENSE Pin (UCC28633 Only)
- 8.3.21 Mode Control and Switching Frequency Modulation
- 8.3.22 Frequency Dither For EMI (except UCC28632)
- 8.4 Device Functional Modes
-
9 Applications and Implementation
- 9.1 Application Information
- 9.2
Typical Application
- 9.2.1 Notebook Adapter, 19.5 V, 65 W
- 9.2.2 UCC28630 Application Schematic
- 9.2.3 Design Requirements
- 9.2.4
Detailed Design Procedure
- 9.2.4.1 Custom Design With WEBENCH? Tools
- 9.2.4.2 Input Bulk Capacitance and Minimum Bulk Voltage
- 9.2.4.3 Transformer Turn Ratio
- 9.2.4.4 Transformer Magnetizing Inductance
- 9.2.4.5 Current Sense Resistor RCS
- 9.2.4.6 Transformer Constraint Verification
- 9.2.4.7 Transformer Selection and Design
- 9.2.4.8 Slope Compensation Verification
- 9.2.4.9 Power MOSFET and Output Rectifier Selection
- 9.2.4.10 Output Capacitor Selection
- 9.2.4.11 Calculation of CC Mode Limit Point
- 9.2.4.12 VDD Capacitor Selection
- 9.2.4.13 Magnetic Sense Resistor Network Selection
- 9.2.4.14 Output LED Pre-Load Resistor Calculation
- 9.2.5 External Wake Pulse Calculation at VSENSE Pin (UCC28633 Only)
- 9.2.6 Energy Star Average Efficiency and Standby Power
- 9.2.7 Application Performance Plots
- 9.3 Dos and Don'ts
- 10Power Supply Recommendations
- 11Layout
- 12器件和文檔支持
- 13機(jī)械、封裝和可訂購(gòu)信息
封裝選項(xiàng)
機(jī)械數(shù)據(jù) (封裝 | 引腳)
- D|7
散熱焊盤機(jī)械數(shù)據(jù) (封裝 | 引腳)
訂購(gòu)信息
9.2.4.2 Input Bulk Capacitance and Minimum Bulk Voltage
The required bulk capacitance value depends on the target minimum bulk capacitor ripple voltage at minimum AC input line, minimum line frequency and on the power level of interest. As a way of estimating, use 1.5-μF to 2-μF per Watt of rated, continuous power to achieve approximately 70 V to 80 V minimum at 88 VRMS input. This case indicates a required bulk capacitance of between approximately 100 μF and 130 μF. Alternatively, the required capacitance may be explicitly calculated for a specific set of requirements using Equation 21.
Using the parameters in Table 8, this calculates a required CBULK of 130 μF.
To help reduce differential mode (DM) emissions for conducted EMC compliance, the bulk capacitance has been split into two separate capacitors C5 and C7 in Figure 44, with a small DM choke L2 inserted between the capacitors. The total resulting capacitance of 127 μF is close to the required minimum requirement per Equation 21, and the design results in a small decrease in the actual bulk capacitor minimum ripple voltage.
Next, verify that the choice of bulk capacitance satisfies the X-capacitor discharge constraints for rate of discharge by the load when X-capacitor sampling is inactive, per Equation 5. The bulk capacitance should be less than the value calculated by Equation 22.
