SLUSEX2A September 2025 – September 2025 UCC27734 , UCC27735
PRODUCTION DATA
The bootstrap capacitor should be sized to have more than enough charge to drive the gate of FET Q1 high, without depleting the bootstrap capacitor more than 10%. A general rule is to size CBOOT to be at least 10 times; as large as the equivalent FET gate capacitance (Cgs).
Cg is calculated based on the voltage driving the high side FET gate (VQ1g) and the FET gate charge (Qg). VQ1g is approximately the bias voltage supplied to VDD subtracted by the forward voltage drop of the bootstrap diode (VBOOT). In this design example, the estimated VQ1g was approximately 14.4V.
The FET used in this example had a specified Qg of 87nC. Based on Qg and VQ1g the calculated Cg was 6.04nF.
Once Cg is estimated, CBOOT should be sized to be at least 10 times larger than Cg.
For this design example a 100nF capacitor was chosen for the bootstrap capacitor.