SLUSFW7 March 2025 UCC27624V-Q1
PRODUCTION DATA
請參考 PDF 數據表獲取器件具體的封裝圖。
The UCC27624V-Q1 device features low quiescent IDD currents. The typical operating supply current in UVLO state and fully-on state (under static and switching conditions) are summarized in the Electrical Characteristics table. The lowest quiescent current (IDD) is achieved when the device is fully on and the outputs are in a static state (DC high or DC low). During this state, all of the internal logic circuits of the device are fully operational. The total supply current is the sum of the quiescent IDD current, the average IOUT current because of switching, and any current related to pullup resistors on the enable pins. Knowing the operating switching frequency (fSW) and the MOSFET gate charge (QG) at the drive voltage being used, the average IOUT current can be calculated as product of QG and fSW.
Typical Characteristics provides a complete characterization of the IDD current as a function of switching frequency at different VDD bias voltages. The linear variation and close correlation with the theoretical value of the average IOUT indicate a negligible shoot-through inside the gate driver device, displaying its high-speed characteristics.