SLVSC82B August 2013 – October 2015 UCC27531-Q1
PRODUCTION DATA.
- 1 Features
- 2 Applications
- 3 Description
- 4 Revision History
- 5 Description (continued)
- 6 Pin Configuration and Functions
- 7 Specifications
- 8 Detailed Description
- 9 Application and Implementation
- 10Power Supply Recommendations
- 11Layout
- 12Device and Documentation Support
- 13Mechanical, Packaging, and Orderable Information
封裝選項(xiàng)
機(jī)械數(shù)據(jù) (封裝 | 引腳)
- DBV|6
散熱焊盤機(jī)械數(shù)據(jù) (封裝 | 引腳)
訂購信息
7 Specifications
7.1 Absolute Maximum Ratings(1)(2)(3)
over operating free-air temperature range (unless otherwise noted)| MIN | MAX | UNIT | ||
|---|---|---|---|---|
| Supply voltage | VDD | –0.3 | 35 | V |
| Continuous | OUTH, OUTL, OUT | –0.3 | VDD + 0.3 | V |
| Pulse | OUTH, OUTL, OUT (200 ns) | –2 | VDD + 0.3 | V |
| Continuous IN, EN, IN+, IN-, IN1, IN2 | –5 | 27 | V | |
| Pulse IN, EN, IN+, IN-, IN1, IN2 (1.5 µs) | –6.5 | 27 | V | |
| Operating virtual junction temperature, TJ | –40 | 150 | °C | |
| Lead temperature | Soldering, 10 sec. | 300 | °C | |
| Reflow | 260 | |||
| Storage temperature, Tstg | –65 | 150 | °C | |
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltages are with respect to GND unless otherwise noted. Currents are positive into, negative out of the specified terminal. See Packaging Section of the datasheet for thermal limitations and considerations of packages.
(3) These devices are sensitive to electrostatic discharge; follow proper device handling procedures.
7.2 ESD Ratings
| VALUE | UNIT | |||
|---|---|---|---|---|
| V(ESD) | Electrostatic discharge | Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) | ±2000 | V |
| Charged-device model (CDM), per JEDEC specification JESD22-C101(2) | ±750 | |||
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)| MIN | NOM | MAX | UNIT | |
|---|---|---|---|---|
| Supply voltage range, VDD | 10 | 18 | 32 | V |
| Ambient temperature range | –40 | 140 | °C | |
| Input voltage, IN, IN+, IN-, IN1, IN2 | –5 | 25 | V | |
| Enable, EN | –5 | 25 | V |
7.4 Thermal Information
| THERMAL METRIC(1) | UCC27531-Q1 | UNIT | |
|---|---|---|---|
| DBV (SOT-23) | |||
| 6 PINS | |||
| RθJA | Junction-to-ambient thermal resistance | 178.3 | °C/W |
| RθJC(top) | Junction-to-case (top) thermal resistance | 109.7 | °C/W |
| RθJB | Junction-to-board thermal resistance | 28.3 | °C/W |
| ψJT | Junction-to-top characterization parameter | 14.7 | °C/W |
| ψJB | Junction-to-board characterization parameter | 27.8 | °C/W |
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.
7.5 Electrical Characteristics
Unless otherwise noted, VDD = 18 V, TA = –40°C to 140°C, 1-µF capacitor from VDD to GND, f = 100 kHz. Currents are positive into, negative out of the specified terminal. OUTH and OUTL are tied together for UCC27531-Q1. Typical condition specifications are at 25°C.| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| BIAS CURRENTS | ||||||
| IDDoff | Startup current | VDD = 7, IN, EN = VDD | 100 | 200 | 300 | μA |
| IN, EN = GND | 100 | 217 | 300 | |||
| UVLO | ||||||
| VON | Supply start threshold | 8 | 8.9 | 9.8 | V | |
| VOFF | Minimum operating voltage after supply start | 7.3 | 8.2 | 9.1 | V | |
| VDD_H | Supply voltage hysteresis | 0.7 | V | |||
| INPUT (IN) | ||||||
| VIN_H | Input signal high threshold, output high | Output High, EN = HIGH | 1.8 | 2 | 2.2 | V |
| VIN_L | Input signal low threshold, output low | Output Low, EN = HIGH | 0.8 | 1 | 1.2 | V |
| VIN_HYS | Input signal hysteresis | 1 | V | |||
| ENABLE (EN) | ||||||
| VEN_H | Enable signal high threshold | Output High | 1.7 | 1.9 | 2.1 | V |
| VEN_L | Enable signal low threshold | Output Low | 0.8 | 1 | 1.2 | V |
| VEN_HYS | Enable signal hysteresis | 0.9 | V | |||
| OUTPUTS (OUTH/OUTL) | ||||||
| ISRC/SNK | Source peak current (OUTH)/ sink peak current (OUTL) | CLOAD = 0.22 µF, f = 1 kHz | –2.5 / +5 | A | ||
| VOH | OUTH, high voltage | IOUTH = –10 mA | VDD - 0.2 | VDD - 0.12 | VDD - 0.07 | V |
| VOL | OUTL, low voltage | IOUTL = 100 mA | 0.065 | 0.125 | V | |
| ROH | OUTH, pullup resistance | TA = 25°C, IOUT = –10 mA | 11 | 12 | 12.5 | Ω |
| TA = –40°C to 140°C, IOUT = –10 mA | 7 | 12 | 20 | |||
| ROL | OUTL, pulldown resistance | TA = 25°C, IOUT = 100 mA | 0.45 | 0.65 | 0.85 | Ω |
| TA = –40°C to 140°C, IOUT = 100 mA | 0.3 | 0.65 | 1.25 | |||
7.6 Switching Characteristics
Unless otherwise noted, VDD = 18 V, TA = –40°C to 140°C, 1-µF capacitor from VDD to GND, f = 100 kHz. Currents are positive into, negative out of the specified terminal. OUTH and OUTL are tied together for UCC27531-Q1. Typical condition specifications are at 25°C.| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| tR | Rise time | CLOAD = 1.8 nF | 15 | ns | ||
| tF | Fall time | CLOAD = 1.8 nF | 7 | ns | ||
| tD1 | Turn-on propagation delay | CLOAD = 1.8 nF, IN = 0 V to 5 V | 17 | 26 | ns | |
| tD2 | Turn-off propagation delay | CLOAD = 1.8 nF, IN = 5 V to 0 V | 17 | 26 | ns | |
Figure 1. Timing Diagram (OUTPUT = OUTH tied to OUTL) INPUT = IN, (EN = VDD), or INPUT = EN, (IN = VDD)
7.7 Typical Characteristics
If not specified, INPUT refers to non-inverting input
Figure 2. Rise Time vs Supply Voltage
Figure 6. Operating Supply Current vs Frequency
Figure 8. Operating Supply Current vs Temperature (Output Switching)
Figure 10. Input Threshold vs Temperature
Figure 12. Output Pullup Resistance vs Temperature
Figure 14. Operating Supply Current vs Temperature (Output in DC ON/OFF Condition)
Figure 16. IN- Input-to-Output Propagation Delay vs Temperature
Figure 18. Fall Time vs Temperature
Figure 20. Rise Time vs Supply Voltage
Figure 3. Fall Time vs Supply Voltage
Figure 5. IN - Propagation Delay vs Supply
Figure 7. Start-Up Current vs Temperature
Figure 9. UVLO Threshold Voltage vs Temperature
Figure 11. Enable Threshold vs Temperature
Figure 13. Output Pulldown Resistance vs Temperature
Figure 15. Input-to-Output Propagation Delay vs Temperature
Figure 17. Rise Time vs Temperature
Figure 19. Operating Supply Current vs Supply Voltage (Output Switching)
Figure 21. Fall Time vs Supply Voltage