ZHCSLG6B June 2020 – April 2022 UCC27288
PRODUCTION DATA
Both the high-side and the low-side driver stages include UVLO protection circuitry which monitors the supply voltage (VDD) and the bootstrap capacitor voltage (VHB–HS). The UVLO circuit inhibits each output until sufficient supply voltage is available to turn on the external MOSFETs. The built-in UVLO hysteresis prevents chattering during supply voltage variations. When the supply voltage is applied to the VDD pin of the device, both the outputs are held low until VDD exceeds the UVLO threshold, typically 7.0 V. Any UVLO condition on the bootstrap capacitor (VHB–HS) disables only the high- side output (HO).
| Condition (VHB-HS > VHBR | HI | LI | HO | LO |
|---|---|---|---|---|
| VDD-VSS < VDDR during device start-up | H | L | L | L |
| L | H | L | L | |
| H | H | L | L | |
| L | L | L | L | |
| VDD-VSS < VDDR – VDDH after device start-up | H | L | L | L |
| L | H | L | L | |
| H | H | L | L | |
| L | L | L | L |
| Condition (VDD > VDDR | HI | LI | HO | LO |
|---|---|---|---|---|
| VHB-HS < VHBR during device start-up | H | L | L | L |
| L | H | L | H | |
| H | H | L | H | |
| L | L | L | L | |
| VHB-HS < VHBR – VHBH after device start-up | H | L | L | L |
| L | H | L | H | |
| H | H | L | H | |
| L | L | L | L |