ZHCSJY8E june 2019 – february 2021 UCC256402 , UCC256403 , UCC256404
PRODUCTION DATA
- 1 特性
- 2 應用
- 3 說明
- 4 Revision History
- 5 Pin Configuration and Functions
- 6 Specifications
-
7 Detailed Description
- 7.1 Overview
- 7.2 Functional Block Diagram
- 7.3 Feature Description
- 7.4
Device Functional Modes
- 7.4.1 High Voltage Start-Up
- 7.4.2 X-Capacitor Discharge
- 7.4.3 Burst Mode Control
- 7.4.4
System State Machine
-
Application and Implementation
- 8.1 Application Information
- 8.2
Typical Application
- 8.2.1 Design Requirements
- 8.2.2
Detailed Design Procedure
- 8.2.2.1 LLC Power Stage Requirements
- 8.2.2.2 LLC Gain Range
- 8.2.2.3 Select Ln and Qe
- 8.2.2.4 Determine Equivalent Load Resistance
- 8.2.2.5 Determine Component Parameters for LLC Resonant Circuit
- 8.2.2.6 LLC Primary-Side Currents
- 8.2.2.7 LLC Secondary-Side Currents
- 8.2.2.8 LLC Transformer
- 8.2.2.9 LLC Resonant Inductor
- 8.2.2.10 LLC Resonant Capacitor
- 8.2.2.11 LLC Primary-Side MOSFETs
- 8.2.2.12 LLC Rectifier Diodes
- 8.2.2.13 LLC Output Capacitors
- 8.2.2.14 HV Pin Series Resistors
- 8.2.2.15 BLK Pin Voltage Divider
- 8.2.2.16 ISNS Pin Differentiator
- 8.2.2.17 VCR Pin Capacitor Divider
- 8.2.2.18 BW Pin Voltage Divider
- 8.2.2.19 Soft Start and Burst Mode Programming
- 8.2.3 Application Curves
-
Application and Implementation
- 8 Power Supply Recommendations
- 9 Layout
- 10Device and Documentation Support
8.2 Boot Capacitor
During burst off period, power consumed by the high-side gate driver from the HB pin must be drawn from CBOOT and will cause its voltage to decay. At the start of the next burst period there must be sufficient voltage remaining on CBOOT to power the high-side gate driver until the conduction period of LO allows it to be replenished from CRVCC. The power consumed by the high-side driver during this burst off period will therefore have a direct impact on the size and cost of capacitors that must be connected to HB and RVCC.
Assume the system has a maximum burst off period of 150 ms and the bootstrap diode has a forward voltage drop of 1V. Target a minimum bootstrap voltage of 8 V to avoid UVLO fault. The maximum allowable voltage drop on the boot capacitor is:
Boot capacitor can then be sized:
