SLUSEM9A September 2022 – June 2024 UCC21755-Q1
PRODUCTION DATA
- 1
- 1 Features
- 2 Applications
- 3 Description
- 4 Pin Configuration and Functions
-
5 Specifications
- 5.1 Absolute Maximum Ratings
- 5.2 ESD Ratings
- 5.3 Recommended Operating Conditions
- 5.4 Thermal Information
- 5.5 Power Ratings
- 5.6 Insulation Specifications
- 5.7 Safety Limiting Values
- 5.8 Electrical Characteristics
- 5.9 Switching Characteristics
- 5.10 Insulation Characteristics Curves
- 5.11 Typical Characteristics
- 6 Parameter Measurement Information
-
7 Detailed Description
- 7.1 Overview
- 7.2 Functional Block Diagram
- 7.3
Feature Description
- 7.3.1 Power Supply
- 7.3.2 Driver Stage
- 7.3.3 VCC and VDD Undervoltage Lockout (UVLO)
- 7.3.4 Active Pulldown
- 7.3.5 Short Circuit Clamping
- 7.3.6 Internal Active Miller Clamp
- 7.3.7 Desaturation (DESAT) Protection
- 7.3.8 Soft Turn-Off
- 7.3.9 Fault (FLT), Reset and Enable (RST/EN)
- 7.3.10 Isolated Analog to PWM Signal Function
- 7.4 Device Functional Modes
-
8 Applications and Implementation
- 8.1 Application Information
- 8.2
Typical Application
- 8.2.1 Design Requirements
- 8.2.2
Detailed Design Procedure
- 8.2.2.1 Input Filters for IN+, IN-, and RST/EN
- 8.2.2.2 PWM Interlock of IN+ and IN-
- 8.2.2.3 FLT, RDY, and RST/EN Pin Circuitry
- 8.2.2.4 RST/EN Pin Control
- 8.2.2.5 Turn-On and Turn-Off Gate Resistors
- 8.2.2.6 Overcurrent and Short Circuit Protection
- 8.2.2.7 Isolated Analog Signal Sensing
- 8.2.2.8 Higher Output Current Using an External Current Buffer
- 8.2.3 Application Curves
- 9 Power Supply Recommendations
- 10Layout
- 11Device and Documentation Support
- 12Revision History
- 13Mechanical, Packaging, and Orderable Information
5.11 Typical Characteristics
Figure 5-4 Output High
Drive Current vs Temperature
| IN+ = High | IN- = Low |
| IN+ = Low | IN- = Low |
Figure 5-12 VCC UVLO vs
Temperature
| VCC = 3.3V | VDD=18V | CL = 100pF |
| RON = 0Ω | ROFF = 0Ω |
| VCC = 3.3 V | VDD=18 V | CL = 10 nF |
| RON = 0 Ω | ROFF = 0 Ω |
Figure 5-18 VOUTPD Output Active Pulldown Voltage vs Temperature
Figure 5-20 VCLP-OUT(L) Short Circuit Clamping Voltage vs Temperature
Figure 5-22 ICLMPI Miller Clamp Sink Current vs Temperature
Figure 5-24 tDESATLEB DESAT Leading Edge Blanking Time vs Temperature
Figure 5-26 tDESATFLT DESAT Sense to /FLT Low Delay Time vs Temperature
Figure 5-28 ICHG
DESAT Charging Current vs Temperature
Figure 5-5 Output Low
Driver Current vs Temperature
| IN+ = Low | IN- = Low |
| IN+ = High | IN- = Low |
Figure 5-13 VDD UVLO vs
Temperature
| VCC = 3.3 V | VDD=18 V | CL = 100 pF |
| RON = 0 Ω | ROFF = 0 Ω |
| VCC = 3.3 V | VDD=18 V | CL = 10 nF |
| RON = 0 Ω | ROFF = 0 Ω |
Figure 5-19 VCLP-OUT(H) Short Circuit Clamping Voltage vs Temperature
Figure 5-21 VCLMPTH Miller Clamp Threshold Voltage vs Temperature
Figure 5-23 tDCLMPI Miller Clamp ON Delay Time vs Temperature
Figure 5-25 tDESATOFF DESAT Propagation Delay to OUT(L) 90% vs Temperature
Figure 5-27 tDESATFIL DESAT Deglitch Filter vs Temperature
Figure 5-29 IDCHG DESAT Discharge Current vs Temperature