SLUSG57 July 2025 UCC21351-Q1
PRODUCTION DATA
The input pins (INA, INB, and EN) of the UCC21351-Q1 are based on a TTL and CMOS compatible input-threshold logic that is totally isolated from the VDD supply voltage. The input pins are easy to drive with logic-level control signals (such as those from 3.3-V micro-controllers), since the UCC21351-Q1 has typical high threshold (VINAH) of 2 V and a typical low threshold of 1 V, which vary little with temperature . A wide hysterisis (VINA_HYS) of 1 V makes for good noise immunity and stable operation. If any of the inputs are ever left open, internal pulldown resistors force the pin low. These resistors are typically 90 kΩ (see Section 7.2). However, it is still recommended to ground an input if it is not being used.
Since the input side of the UCC21351-Q1 is isolated from the output drivers, this allows the user to choose the most efficient VDD for their chosen gate. The amplitude of any signal applied to INA or INB should never be at a voltage higher than VCCI.