ZHCSPT6D July 2023 – June 2024 TPSM8287A06 , TPSM8287A10 , TPSM8287A12 , TPSM8287A15
PRODUCTION DATA
- 1
- 1 特性
- 2 應(yīng)用
- 3 說明
- 4 Device Options
- 5 Pin Configuration and Functions
- 6 Specifications
-
7 Detailed Description
- 7.1 Overview
- 7.2 Functional Block Diagram
- 7.3
Feature Description
- 7.3.1 Fixed-Frequency DCS-Control Topology
- 7.3.2 Forced-PWM and Power-Save Modes
- 7.3.3 Precise Enable
- 7.3.4 Start-Up
- 7.3.5 Switching Frequency Selection
- 7.3.6 Output Voltage Setting
- 7.3.7 Compensation (COMP)
- 7.3.8 Mode Selection / Clock Synchronization (MODE/SYNC)
- 7.3.9 Spread Spectrum Clocking (SSC)
- 7.3.10 Output Discharge
- 7.3.11 Undervoltage Lockout (UVLO)
- 7.3.12 Overvoltage Lockout (OVLO)
- 7.3.13 Overcurrent Protection
- 7.3.14 Power Good (PG)
- 7.3.15 Remote Sense
- 7.3.16 Thermal Warning and Shutdown
- 7.3.17 Stacked Operation
- 7.4 Device Functional Modes
- 7.5 Programming
- 8 Device Registers
-
9 Application and Implementation
- 9.1 Application Information
- 9.2 Typical Application
- 9.3 Typical Application Using Four TPSM8287Axx in Parallel Operation
- 9.4 Power Supply Recommendations
- 9.5 Layout
- 10Device and Documentation Support
- 11Revision History
- 12Mechanical, Packaging, and Orderable Information
封裝選項
機械數(shù)據(jù) (封裝 | 引腳)
- RDW|39
散熱焊盤機械數(shù)據(jù) (封裝 | 引腳)
訂購信息
7.3.13.2 Hiccup Mode
Hiccup mode reduces the power dissipation during an overload event. To enable hiccup operation, make sure that HICCUPEN = 1 in the CONTROL1 register. If hiccup operation is enabled and the high-side switch current hits the high-side current limit threshold on 32 consecutive switching cycles, the device:
- Stops switching for 128 μs, after which the device automatically starts switching again (it starts a new soft-start sequence)
- Sets the HICCUP bit in the STATUS register
- Pulls the PG pin low. The PG pin stays low until the overload condition goes away and the device can start up and regulate the output voltage.
Hiccup operation continues – in a repeating sequence of 32 cycles in current limit, followed by a pause of 128 μs, followed by a soft-start attempt – for as long as the output overload condition exists.
The device clears the HICCUP bit if reading the STATUS register when the overload condition no longer exists. Figure 7-19 shows 2 cycles of hiccup operation, at which point the over load is removed and the part continues in normal operation.
Figure 7-19 Hiccup Current Limit