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ZHCSPT6D July 2023 – June 2024 TPSM8287A06 , TPSM8287A10 , TPSM8287A12 , TPSM8287A15

PRODUCTION DATA

封裝選項

機械數(shù)據(jù) (封裝 | 引腳)

RDV|39
- MPQF703A

散熱焊盤機械數(shù)據(jù) (封裝 | 引腳)

訂購信息

7.3.6.1 Output Voltage Setpoint

During initialization, the device reads the state of the VSETx pins and selects the default output voltage according to Table 7-2. Note that the VSETx pins also select the I²C target address of the device and the setting of the VRANGE bits located in register CONTROL2. The VSETx pins are only read during a power cycle of VIN or by setting RESET = 1 through the I²C interface. Changing the configuration after VIN is present does not affect the content of the registers or the I²C address. Make sure that there is no stray current path connected to the VSETx pins and that the parasitic capacitance between the VSETx pins and GND is less than 100 pF. For proper operation, the input voltage needs to be at least 1.4 V above the selected output voltage.

Table 7-2 Start-Up Output Voltage and I²C Address

VSET3	VSET2	VSET1	I²C ADDRESS	VRANGE [1:0]	VOUT VOLTAGE
GND	GND	VIN	0x40	0b10	0.45 V
GND	VIN	GND	0x40	0b10	0.50 V
GND	VIN	VIN	0x40	0b10	0.55 V
VIN	GND	GND	0x40	0b10	0.60 V
VIN	GND	VIN	0x40	0b10	0.65 V
VIN	VIN	GND	0x40	0b10	0.70 V
VIN	VIN	VIN	0x40 ^⁽¹⁾	0b10	0.75 V
47 kΩ to GND	GND	GND	0x41 ^⁽¹⁾	0b11	0.80 V
47 kΩ to GND	GND	VIN	0x41	0b11	0.85 V
47 kΩ to GND	VIN	GND	0x41	0b11	0.90 V
47 kΩ to GND	VIN	VIN	0x41	0b11	0.95 V
47 kΩ to VIN	GND	GND	0x41	0b11	1.00 V
47 kΩ to VIN	GND	VIN	0x41 ^⁽¹⁾	0b11	1.05 V
47 kΩ to VIN	VIN	GND	0x41 ^⁽¹⁾	0b11	1.10 V
47 kΩ to VIN	VIN	VIN	0x41	0b11	1.15 V
GND	47 kΩ to GND	GND	0x42 ^⁽¹⁾	0b11	1.20 V
GND	47 kΩ to GND	VIN	0x42	0b11	1.25 V
GND	47 kΩ to VIN	GND	0x42	0b11	1.30 V
GND	47 kΩ to VIN	VIN	0x42	0b11	1.35 V
VIN	47 kΩ to GND	GND	0x42	0b11	1.40 V
VIN	47 kΩ to GND	VIN	0x42	0b11	1.45 V
VIN	47 kΩ to VIN	GND	0x42	0b11	1.50 V
VIN	47 kΩ to VIN	VIN	0x42	0b11	1.55 V
GND	GND	47 kΩ to GND	0x43	0b11	1.60 V
GND	GND	47 kΩ to VIN	0x43	0b11	1.65 V
GND	VIN	47 kΩ to GND	0x43	0b11	1.70 V
GND	VIN	47 kΩ to VIN	0x43	0b11	1.75 V
VIN	GND	47 kΩ to GND	0x43	0b11	1.80 V
VIN	GND	47 kΩ to VIN	0x43	0b11	1.85 V
VIN	VIN	47 kΩ to GND	0x43	0b11	1.90 V
VIN	VIN	47 kΩ to VIN	0x43	0b11	1.95 V
47 kΩ to GND	47 kΩ to GND	GND	0x40	0b11	2.00 V
47 kΩ to GND	47 kΩ to GND	VIN	0x40	0b11	2.05 V
47 kΩ to GND	47 kΩ to VIN	GND	0x40	0b11	2.10 V
47 kΩ to GND	47 kΩ to VIN	VIN	0x40	0b11	2.15 V
47 kΩ to VIN	47 kΩ to GND	GND	0x40	0b11	2.20 V
47 kΩ to VIN	47 kΩ to GND	VIN	0x40	0b11	2.25 V
47 kΩ to VIN	47 kΩ to VIN	GND	0x40	0b11	2.30 V
47 kΩ to VIN	47 kΩ to VIN	VIN	0x40	0b11	2.35 V
47 kΩ to GND	GND	47 kΩ to GND	0x41	0b11	2.40 V
47 kΩ to GND	GND	47 kΩ to VIN	0x41	0b11	2.45 V
47 kΩ to GND	VIN	47 kΩ to GND	0x41	0b11	2.50 V
47 kΩ to GND	VIN	47 kΩ to VIN	0x41	0b11	2.55 V
47 kΩ to VIN	GND	47 kΩ to GND	0x41	0b11	2.60 V
47 kΩ to VIN	GND	47 kΩ to VIN	0x41	0b11	2.65 V
47 kΩ to VIN	VIN	47 kΩ to GND	0x41	0b11	2.70 V
47 kΩ to VIN	VIN	47 kΩ to VIN	0x41	0b11	2.75 V
GND	47 kΩ to GND	47 kΩ to GND	0x42	0b11	2.80 V
GND	47 kΩ to GND	47 kΩ to VIN	0x42	0b11	2.85 V
GND	47 kΩ to VIN	47 kΩ to GND	0x42	0b11	2.90 V
GND	47 kΩ to VIN	47 kΩ to VIN	0x42	0b11	2.95 V
VIN	47 kΩ to GND	47 kΩ to GND	0x42	0b11	3.00 V
VIN	47 kΩ to GND	47 kΩ to VIN	0x42	0b11	3.05 V
VIN	47 kΩ to VIN	47 kΩ to GND	0x42	0b11	3.10 V
VIN	47 kΩ to VIN	47 kΩ to VIN	0x42	0b11	3.15 V
47 kΩ to GND	47 kΩ to GND	47 kΩ to GND	0x43	0b11	3.20 V
47 kΩ to GND	47 kΩ to GND	47 kΩ to VIN	0x43	0b11	3.25 V
47 kΩ to GND	47 kΩ to VIN	47 kΩ to GND	0x43	0b11	3.30 V
47 kΩ to GND	47 kΩ to VIN	47 kΩ to VIN	0x43	0b11	3.35 V
47 kΩ to VIN	47 kΩ to GND	47 kΩ to GND	0x44	0b10	0.75 V
GND	GND	GND	0x40	0b11	0.80 V
47 kΩ to VIN	47 kΩ to GND	47 kΩ to VIN	0x44	0b11	1.05 V
47 kΩ to VIN	47 kΩ to VIN	47 kΩ to GND	0x44	0b11	1.10 V
47 kΩ to VIN	47 kΩ to VIN	47 kΩ to VIN	0x44	0b11	1.20 V

(1)

A second I²C address for the same output voltage is found at the bottom of this table

During start-up, the output voltage ramps up to the target value set by the VSETx pins before ramping up or down to any new value programmed to the device over the I²C interface. If the user programs new output voltage setpoints (VOUT[7:0]), output voltage range (VRANGE[1:0]), or soft-start time (SSTIME[1:0]) settings when the device has already begun the soft-start sequence, the device ignores the new values until the soft-start sequence is complete. When changing VOUT[7:0], VRAMP[1:0], or SSTIME[1:0] while EN is low, the device uses the new values the next time it is enabled.