SLVSFZ4A December 2020 – February 2021 TPS929121-Q1
PRODUCTION DATA
- 1 Features
- 2 Applications
- 3 Description
- 4 Revision History
- 5 Device Comparison Table
- 6 Pin Configuration and Functions
- 7 Specifications
-
8 Detailed Description
- 8.1 Overview
- 8.2 Functional Block Diagram
- 8.3
Feature Description
- 8.3.1 Device Bias and Power
- 8.3.2 Constant Current Output
- 8.3.3 PWM Dimming
- 8.3.4 On-chip 8-bit Analog-to-Digital Converter (ADC)
- 8.3.5
Diagnostic and Protection in Normal State
- 8.3.5.1 Fault Masking
- 8.3.5.2 Supply Undervoltage Lockout Diagnostics in Normal State
- 8.3.5.3 Low-Supply Warning Diagnostics in Normal State
- 8.3.5.4 Reference Diagnostics in Normal State
- 8.3.5.5 Pre-Thermal Warning and Overtemperature Protection in Normal State
- 8.3.5.6 Communication Loss Diagnostic in Normal State
- 8.3.5.7 LED Open-Circuit Diagnostics in Normal State
- 8.3.5.8 LED Short-Circuit Diagnostics in Normal State
- 8.3.5.9 On-Demand Off-State Invisible Diagnostics
- 8.3.5.10 On-Demand Off-State Single-LED Short-Circuit (SS) Diagnostics
- 8.3.5.11 Automatic Single-LED Short-Circuit (AutoSS) Detection in Normal State
- 8.3.5.12 EEPROM CRC Error in Normal State
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- 8.3.6
Diagnostic and Protection in Fail-Safe States
- 8.3.6.1 Fault Masking
- 8.3.6.2 Supply UVLO Diagnostics in Fail-Safe States
- 8.3.6.3 Low-supply Warning Diagnostics in Fail-Safe states
- 8.3.6.4 Reference Diagnostics at Fail-Safe States
- 8.3.6.5 Overtemperature Protection in Fail-Safe State
- 8.3.6.6 LED Open-circuit Diagnostics in Fail-Safe State
- 8.3.6.7 LED Short-circuit Diagnostics in Fail-Safe State
- 8.3.6.8 EEPROM CRC Error in Fail-safe State
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- 8.4 Device Functional Modes
- 8.5 Programming
- 8.6 Register Maps
- 9 Application and Implementation
- 10Power Supply Recommendations
- 11Layout
- 12Device and Documentation Support
- 13Mechanical, Packaging, and Orderable Information
7.7 Typical Characteristics
| R(REF) = 8.35 kΩ | ||
| CONF_REFRANGE[1:0] = 3h | ||
| CONF_IOUTx[5:0] = 3Fh | ||
| CONF_REFRANGE[1:0] = 3h | ||
| R(REF) = 12.6 kΩ | ||
| CONF_IOUTx[5:0] = 3Fh | ||
| R(REF) = 12.6 kΩ | ||
| CONF_IOUTx[5:0] = 3Fh | ||
Figure 7-9 LDO Output Line Regulation
| CONF_REFRANGE[1:0] = 3h | ||
| CONF_REFRANGE[1:0] = 3h | ||
| CONF_REFRANGE[1:0] = 3h | ||
| R(REF) = 8.35 kΩ & 12.6 kΩ | ||
| CONF_REFRANGE[1:0] = 3h | ||
Figure 7-10 LDO Output Load Regulation
| Ch1 = V(SUPPLY) | Ch3 = V(OUT0) | Ch6 = I(OUT0) |
| Ch1 = V(SUPPLY) | Ch3 = V(OUT0) | Ch6 = I(OUT0) |
| Ch1 = V(SUPPLY) | Ch2 = ERR | Ch3 = V(OUT0) |
| Ch6 = I(OUT0) |
| Ch1 = V(SUPPLY) | Ch2 = ERR | Ch3 = V(OUT0) |
| Ch6 = I(OUT0) |
| Ch1 = V(SUPPLY) | Ch2 = ERR | Ch3 = V(OUT0) |
| Ch4 = V(LDO) | Ch6 = I(OUT0) |
| Ch1 = V(SUPPLY) | Ch2 = ERR | Ch4 = V(LDO) |
| Ch6 = I(LDO) | 0 to 80 mA |
| Ch1 = V(SUPPLY) | Ch2 = ERR | Ch3 = V(OUT0) |
| Ch6 = I(OUT0) | T(ODPW) = 100 μs | F(PWM) = 2 kHz |
| Ch1 = V(SUPPLY) | Ch2 = ERR | Ch3 = V(OUT5) |
| Ch6 = I(OUT0) | T(ODPW) = 100 μs | F(PWM) = 2 kHz |
| Ch1 = V(SUPPLY) | Ch2 = ERR | Ch3 = V(OUT5) |
| Ch6 = I(OUT0) | T(ODPW) = 100 μs | F(PWM) = 2 kHz |
| Ch1 = V(SUPPLY) | Ch3 = V(OUT0) | Ch6 = I(OUT0) |
| Ch1 = V(SUPPLY) | Ch2 = ERR | Ch3 = V(OUT0) |
| Ch6 = I(OUT0) |
| Ch1 = V(SUPPLY) | Ch2 = ERR | Ch3 = V(OUT0) |
| Ch6 = I(OUT0) |
| Ch1 = V(SUPPLY) | Ch2 = ERR | Ch3 = V(OUT0) |
| Ch6 = I(OUT0) |
| Ch1 = V(SUPPLY) | Ch2 = ERR | Ch3 = V(OUT0) |
| Ch4 = V(LDO) | Ch6 = I(OUT0) |
| Ch1 = V(SUPPLY) | Ch2 = ERR | Ch3 = V(OUT0) |
| Ch6 = I(OUT0) | T(ODPW) = 100 μs | F(PWM) = 2 kHz |
| Ch1 = V(SUPPLY) | Ch2 = ERR | Ch3 = V(OUT5) |
| Ch6 = I(OUT5) | T(ODPW) = 100 μs | F(PWM) = 2 kHz |
| V(ADCSHORTTH) = 4 V | ||
| Ch1 = V(SUPPLY) | Ch2 = ERR | Ch3 = V(OUT5) |
| Ch6 = I(OUT0) | T(ODPW) = 100 μs | F(PWM) = 2 kHz |
| Ch1 = V(SUPPLY) | Ch2 = ERR | Ch3 = V(OUT5) |
| Ch6 = I(OUT0) | T(ODPW) = 100 μs | F(PWM) = 2 kHz |