ZHCSGY7B October 2017 – January 2018 TPS92830-Q1
PRODUCTION DATA.
- 1 特性
- 2 應用
- 3 說明
- 4 修訂歷史記錄
- 5 說明 （續(xù)）
- 6 Pin Configuration and Functions
- 7 Specifications
- 8 Detailed Description
- 9 Application and Implementation
- 10Layout
- 11器件和文檔支持
- 12機械、封裝和可訂購信息
7.6 Timing Requirements
| MIN | NOM | MAX | UNIT | ||
|---|---|---|---|---|---|
| t(OPEN_deg) | LED open-circuit deglitch time, described in LED open-circuit diagnostics section | 100 | 125 | 150 | µs |
| t(SG_deg) | LED short-to-GND detection deglitch time, described in the LED short-to-GND diagnostics section | 100 | 125 | 150 | µs |
| t(SG_retry_ON) | Channel output SENSEx short-to-ground retry on-time, described in the LED short-to-GND auto retry section | 100 | 125 | 150 | µs |
| t(SG_retry_OFF) | Channel output SENSEx short-to-ground retry off-time, described in LED short-to-GND auto retry section | 10.8 | ms | ||
| tOPEN_retry_ON) | Channel output SENSEx open-circuit retry on-time | 100 | 125 | 150 | µs |
| t(OPEN_retry_OFF) | Channel output SENSEx open-circuit retry off-time | 10.8 | ms | ||
| D(PWM_10) | PWM duty cycle generated internally, nominal 10% duty cycle, as measured on output channel; see Figure 1， T(J) = 25ºC | 9.8% | 10% | 10.2% | |
| PWM duty cycle generated internally, nominal 10% duty cycle, as measured on output channel; see Figure 1， T(J) = -40ºC to 150ºC | 9.75% | 10% | 10.25% | ||
| td(DERATE) | Derate current-response delay time when DERATE steps from 1.8 V to 2.4 V | 25 | µs | ||
| t(CP_STARTUP) | V(IN) = 14 V, Cs = 150 nF, CPOUT voltage reaches 18 V as shown in Device Start-Up Delay diagram | 25 | µs | ||
| f(DRV_PWM) | Recommended PWM driving-frequency range | 2000 | Hz | ||
Figure 1. Channel-Current Output Timing Diagram