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ZHCSCJ5A June 2014 – June 2014 TPS82740A , TPS82740B

PRODUCTION DATA.

封裝選項

請參考 PDF 數(shù)據(jù)表獲取器件具體的封裝圖。

機械數(shù)據(jù) (封裝 | 引腳)

SIP|9

散熱焊盤機械數(shù)據(jù) (封裝 | 引腳)

訂購信息

8 Specifications

8.1 Absolute Maximum Ratings⁽¹⁾

Over operating free-air temperature range (unless otherwise noted)

		VALUE		UNIT
		MIN	MAX	UNIT
Pin voltage ⁽²⁾	VIN	–0.3	6	V
	EN, CTRL, VSEL1, VSEL2, VSEL3	–0.3	V_IN +0.3V	V
	VOUT, LOAD	–0.3	3.7	V
Operating ambient temperature range, T_A⁽³⁾		-40	85	°C
Operating junction temperature T_J		-40	125	°C

(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability.

(2) All voltage values are with respect to network ground terminal GND.

(3) In applications where ambient temperature (T_A) constantly stays above 70°C, the product life time might degrade. MLCC capacitor reliability and lifetime is depending on temperature and applied voltage conditions. At higher temperatures, MLCC capacitors are subject to stronger stress. The most critical parameter is the Insulation Resistance (IR) resulting in leakage current.

8.2 Handling Ratings

			MIN	MAX	UNIT
T_stg	Storage temperature range		–55	125	°C
V_(ESD)	Electrostatic discharge	Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins⁽¹⁾	0	2000	V
V_(ESD)	Electrostatic discharge	Charged device model (CDM), per JEDEC specification JESD22-C101, all pins⁽²⁾	0	1000	V

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. The human body model is a 100-pF capacitor discharged through a 1.5-kΩ resistor into each pin.

(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

8.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

			MIN	MAX	UNIT
V_IN	Supply voltage V_IN		2.2	5.5	V
I_OUT + I_LOAD	Device output current (sum of I_OUT and I_LOAD)	V_OUTnom + 0.7V ≤ V_IN ≤ 5.5V		200	mA
I_OUT + I_LOAD	Device output current (sum of I_OUT and I_LOAD)	V_OUTnom ≤ V_IN ≤ V_OUTnom +0.7V		100
I_LOAD	Load current (current from LOAD pin)			100
C_OUT	Additional output capacitance connected to VOUT pin (not including LOAD pin)			10	µF
C_LOAD	Capacitance connected to LOAD pin			10	µF
T_J	Operating junction temperature range		-40	90	°C
T_A	Operating ambient temperature range		-40	85	°C

8.4 Thermal Information

THERMAL METRIC⁽¹⁾		TPS82740	UNIT
		µSIP
		9 PINS
R_θJA	Junction-to-ambient thermal resistance	83	°C/W
R_θJC(top)	Junction-to-case (top) thermal resistance	53
R_θJB	Junction-to-board thermal resistance	-
ψ_JT	Junction-to-top characterization parameter	-
ψ_JB	Junction-to-board characterization parameter	-
R_θJC(bot)	Junction-to-case (bottom) thermal resistance	-

(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

8.5 Electrical Characteristics

V_IN = 3.6V, T_A = –40°C to 85°C, typical values are at T_A = 25°C (unless otherwise noted)

PARAMETER		TEST CONDITIONS		MIN	TYP	MAX	UNIT
SUPPLY
V_IN	Input voltage range			2.2		5.5	V
I_Q	Operating quiescent current	EN = V_IN, CTRL = GND, I_OUT = 0µA, V_OUT = 1.8V / 2.6V, device not switching			360	2300	nA
		EN = V_IN, I_OUT = 0mA, CTRL = GND, V_OUT = 1.8V device switching			460
		EN = V_IN, I_OUT = 0mA, CTRL = GND, V_OUT = 2.6V, device switching			500
		EN = V_IN, I_OUT = 0mA., CTRL = V_IN, V_OUT = 1.8V, device not switching			12.5		µA
		EN = V_IN, I_OUT = 0mA., CTRL = V_IN, V_OUT = 2.6V, device not switching			13.5		µA
I_SD	Shutdown current	EN = GND, shutdown current into V_IN			70		nA
I_SD	Shutdown current	EN = GND, shutdown current into V_IN, T_A = 60°C			150		nA
V_{TH_}_UVLO+	Undervoltage lockout threshold	Rising V_IN			2.075	2.15	V
V_{TH_UVLO-}	Undervoltage lockout threshold	Falling V_IN			1.925	2	V
INPUTS EN, CTRL, VSEL 1-3
V_{IH TH}	High level input threshold	2.2V ≤ V_IN ≤ 5.5V				1.1	V
V_{IL TH}	Low level input threshold	2.2V ≤ V_IN ≤ 5.5V		0.4			V
I_IN	Input bias Current	T_A = 25°C				10	nA
I_IN	Input bias Current	T_A = –40°C to 85°C				25	nA
POWER SWITCHES
I_LIMF	High side MOSFET switch current limit	2.2V ≤ V_IN ≤ 5.5V			430		mA
I_LIMF	Low side MOSFET switch current limit	2.2V ≤ V_IN ≤ 5.5V			430		mA
OUTPUT DISCHARGE SWITCH (VOUT)
R_{DSCH_VOUT}	MOSFET on-resistance	EN = GND, I_OUT = -10mA into VOUT pin			30	65	Ω
I_{IN_VOUT}	Bias current into VOUT pin	EN = V_IN, V_OUT = 2V / 2.8V, CTRL = GND	T_A = 25°C		40	660	nA
I_{IN_VOUT}	Bias current into VOUT pin	EN = V_IN, V_OUT = 2V / 2.8V, CTRL = GND	T_A = –40°C to 85°C			1570	nA
LOAD OUTPUT (LOAD)
R_LOAD	High side MOSFET on-resistance	I_LOAD = 50mA, CTRL = V_IN, V_OUT = 2.0V / 2.8V, 2.2 V ≤ V_IN ≤ 5.5V			0.6	1.25	Ω
R_{DSCH_LOAD}	Low side MOSFET on-resistance	CTRL = GND, 2.2V ≤ V_IN ≤ 5.5V, I_LOAD = - 10mA			30	65	Ω
t_{Rise_LOAD}	V_LOAD rise time	Starting with CTRL low to high transition, time to ramp V_LOAD from 0V to 95%, V_OUT = 1.8V / 2.6V, 2.2V ≤ V_IN ≤ 5.5V, I_LOAD = 1mA, T_A = 25°C			315	800	µs
AUTO 100% MODE TRANSITION
V_{TH_100+}	Auto 100% Mode exit detection threshold ⁽¹⁾	Rising V_IN,100% Mode is left with V_IN = V_OUT + V_{TH_100+}, max value at T_J = 85°C		170	250	340	mV
V_{TH_100-}	Auto 100% Mode enter detection threshold ⁽¹⁾	Falling V_IN, 100% Mode is entered with V_IN = V_OUT + V_{TH_100-}, max value at T_J = 85°C		110	200	280	mV
OUTPUT
t_{Startup_delay}	Regulator start up delay time	From transition EN = low to high until device starts switching			10	25	ms
t_Softstart	Softstart time with reduced switch current limit	2.2V ≤ V_IN ≤ 5.5V, EN = V_IN			400	1200	µs
I_{LIM_softstart}	High side MOSFET switch current limit	Reduced switch current limit during softstart		80	150	200	mA
I_{LIM_softstart}	Low side MOSFET switch current limit	Reduced switch current limit during softstart			150		mA
V_VOUT	Output voltage range	Output voltages are selected with pins VSEL1, VSEL2, VSEL3	TPS82740A	1.8		2.5	V
	Output voltage range	Output voltages are selected with pins VSEL1, VSEL2, VSEL3	TPS82740B	2.6		3.3	V
	Output voltage accuracy	I_OUT = 10mA, V_OUT = 1.8V / 2.6V		-2.5	0	2.5	%
	Output voltage accuracy	I_OUT = 100mA, V_OUT = 1.8V / 2.6V		–2	0	2	%
	DC output voltage load regulation	V_OUT = 1.8V / 2.6V, CTRL = V_IN			0.001		%/mA
	DC output voltage line regulation	V_OUT = 1.8V / 2.6V, CTRL = V_IN, I_OUT = 10 mA, 2.5V ≤ V_IN ≤ 5.5V			0		%/V

(1) V_IN is compared to the programmed output voltage (V_OUT). When V_IN–V_OUT falls below V_{TH_100-} , the device enters 100% Mode by turning the high side MOSFET on. 100% Mode is exited when V_IN–V_OUT exceeds V_{TH_100+} and the device starts switching. The hysteresis for the 100% Mode detection threshold V_{TH_100+} - V_{TH_100-} is always positive and 50 mV(typ.)

8.6 Typical Characteristics

TABLE OF GRAPHS			FIGURE
η	Efficiency	vs Output Current	Figure 3, Figure 4, Figure 5, Figure 6
η	Efficiency	vs Input Voltage	Figure 7, Figure 8, Figure 9, Figure 10
V_OUT	Output voltage	vs Output curent	Figure 11, Figure 12, Figure 13, Figure 14
I_Q	Operating quiescent current	vs Input voltage	Figure 1
I_SD	Shutdown current	vs Input voltage	Figure 2
	Automatic Transition into 100% Mode		Figure 18, Figure 19, Figure 20
F_SW	Switching frequency	vs Output current	Figure 15, Figure 16, Figure 17
	Line and Load Transient Performance		Figure 21, Figure 22, Figure 23, Figure 24, Figure 25, Figure 26, Figure 27, Figure 28, Figure 29, Figure 30
	AC load regulation performance		Figure 31, Figure 32
LOAD	LOAD Output Behavior		Figure 33, Figure 34, Figure 35
	Input Voltage Ramp up / down		Figure 36, Figure 37, Figure 38, Figure 39