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ZHCSOF4A February 2022 – September 2022 TPS7H5005-SEP , TPS7H5006-SEP , TPS7H5007-SEP , TPS7H5008-SEP

PRODUCTION DATA

封裝選項

機械數據 (封裝 | 引腳)

PW|24
- MPDS363A

散熱焊盤機械數據 (封裝 | 引腳)

訂購信息

7.5 Electrical Characteristics: All Devices

T_J = –55°C to 125°C, VIN = 4 V to 14 V (unless otherwise noted)

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
SUPPLY VOLTAGES AND CURRENTS
VIN	Operating input voltage		4		14	V
IDD	Operating supply current	f_SW = 500 kHz, No load for OUTA, OUTB, SRA, and SRB		6.25	8	mA
		f_SW = 1 MHz, No load for OUTA, OUTB, SRA, and SRB		6.75	9.5
		f_SW = 2 MHz, No load for OUTA, OUTB, SRA, and SRB		8.5	13.5
		f_SW = 500 kHz, C_LOAD = 100 pF for OUTA, OUTB, SRA, and SRB		7.5	9.5
		f_SW = 1 MHz, C_LOAD = 100 pF for OUTA, OUTB, SRA, and SRB		9	12
		f_SW = 2 MHz, C_LOAD = 100 pF for OUTA, OUTB, SRA, and SRB		14	19.5
I_DD(dis)	Standby current	EN = 0 V			3	mA
VLDO	Internal linear regulator output voltage	5 V ≤ VIN ≤ 14 V, f_sw ≤ 1 MHz	4.75	5	5.2	V
VLDO	Internal linear regulator output voltage	5 V ≤ VIN ≤ 14 V, f_sw = 2 MHz	4.65	5	5.2	V
ENABLE AND UNDERVOLTAGE LOCKOUT
V_ENR	EN threshold rising		0.57	0.6	0.65	V
V_ENF	EN threshold falling		0.47	0.5	0.55	V
V_ENH	EN hysteresis voltage		85	95	105	mV
I_EN	EN pin input leakage current	VIN = 14 V, EN = 5 V		5	50	nA
VLDO_UVLOR	VLDO UVLO rising		3.44	3.55	3.66	V
VLDO_UVLOF	VLDO UVLO falling		3.29	3.4	3.51	V
VLDO_UVLOH	VLDO UVLO hysteresis		115	135	160	mV
SOFT START
I_SS	Soft-start current	SS = 0.3 V	1.98	2.7	3.32	μA
ERROR AMPLIFIER
EA_gm	Transconductance	–2 μA < I_COMP < 2 μA, V_(COMP) = 1 V	1150	1800	2500	μA/V
EA_DC	DC gain	V_SENSE = 0.6 V		10000		V/V
EA_ISRC	Error amplifier source current	V_(COMP) = 1 V, 100-mV input overdrive	100		190	μA
EA_ISNK	Error amplifier sink current	V_(COMP) = 1 V, 100-mV input overdrive	100		190	μA
EA_ro	Error amplifier output resistance			7		MΩ
EA_OS	Error amplifier input offset voltage		–2		2	mV
EA_IB	Error amplifier input bias current				35	nA
EA_BW	Bandwidth			10		MHz
OSCILLATOR
SYNC_IL	SYNC in low-level	VIN < 5 V			0.8	V
SYNC_IL	SYNC in low-level	VIN ≥ 5 V			0.8	V
SYNC_IH	SYNC in high-level	VIN < 5 V	3.5			V
SYNC_IH	SYNC in high-level	VIN ≥ 5 V	3.5			V
F_SYNC	SYNC in frequency range		200		4000	kHz
D_SYNC	SYNC in duty cycle	Duty cycle of external clock	40		60	%
SYNC_RT	SYNC out low-to-high rise time (10%/90%)	C_LOAD = 25 pF		6	15	ns
SYNC_FT	SYNC out high-to-low fall time (10%/90%)	C_LOAD = 25 pF		6	17	ns
SYNC_OL	SYNC out low level	I_OL = 10 mA			500	mV
VLDO – SYNC_OH	SYNC out high level ⁽¹⁾	I_OH = 10 mA			0.5	V
EXT_DT	Externally set frequency detection time	RT = Open, f = 200 kHz			20	μs
FSW_EXT	Externally set frequency	RT = 1.07 M?	95	105	115	kHz
		RT = 511 k?	190	210	230
		RT = 90.9 k?	900	1000	1100
		RT = 34.8 k?	1700	2000	2300
VOLTAGE REFERENCE
VREF	Internal voltage reference initial tolerance	Measured at COMP, 25°C	0.609	0.613	0.615	V
	Internal voltage reference	Measured at COMP, –55°C	0.607	0.609	0.612
	Internal voltage reference	Measured at COMP, 125°C	0.611	0.614	0.617
REFCAP	REFCAP voltage	REFCAP = 470 nF	1.213	1.225	1.237	V
CURRENT SENSE, CURRENT LIMIT AND HICCUP
CCSR	COMP to CS_ILIM ratio		2.00	2.06	2.12
V_{CS_ILIM}	Current limit (overcurrent) threshold			1.05	1.09	V
I_{HICC_DEL}	Hiccup delay current	CS_ILIM = 1.3 V, COMP = 3 V, VSENSE = REFCAP/2 V, C_HICC = 3 nF, LEB = 49.9 k?, f_sw = 100 kHz		80		μA
I_{HICC_RST}	Hiccup restart current			1		μA
V_{HICC_PU}	Hiccup pull-up threshold			1.0		V
V_{HICC_SD}	Hiccup shut-down threshold			0.6		V
V_{HICC_RST}	Hiccup restart threshold			0.3		V
SLOPE COMPENSATION
	Slope compensation	f_SW = 100 kHz, RSC = 1.18 M?		0.033		V/μs
		f_SW = 200 kHz, RSC = 562 k?		0.066
		f_SW = 1000 kHz, RSC = 100 k?		0.333
		f_SW = 2000 kHz, RSC = 49.9 k?		0.666
FAULT
V_FLTR	FLT threshold rising		0.57	0.6	0.65	V
V_FLTF	FLT threshold falling		0.47	0.5	0.55	V
V_FLTH	FLT hysteresis voltage		90	100	110	mV
T_FLT	FLT minimum pulse width	V_FLT = 1 V	0.4		1.4	μs
t_DFLT	FLT delay duration	f_sw = 100 kHz	140	152	169	μs
		f_sw = 200 kHz	66	78	86
		f_sw = 1 MHz	14	17	21
		f_sw = 2 MHz	7	11	14
THERMAL SHUTDOWN
	Thermal shutdown		165	175	185	°C
	Thermal shutdown hysteresis		10	15	20	°C
PRIMARY AND SYNCHRONOUS RECTIFIER OUTPUTS
	Low-level threshold	I_SINK = 10 mA		0.5		V
	High-level threshold	I_SOURCE = 10 mA		4.5		V
	Rise/fall time	R_LOAD = 50 k?, C_LOAD = 100 pF, 10% to 90%		10	17	ns
R_{SRC_P}	Output source resistance	I_OUT = 20 mA, 5 V ≤ VIN ≤ 14 V		15		Ω
R_{SINK_P}	Output sink resistance	I_OUT = 20 mA, 5 V ≤ VIN ≤ 14 V		15		Ω

(1) Bench verified. Not tested in production.