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ZHCSBU8D October 2013 – April 2018

PRODUCTION DATA.

封裝選項

機械數(shù)據(jù) (封裝 | 引腳)

PWP|20
- MHTS001H

散熱焊盤機械數(shù)據(jù) (封裝 | 引腳)

PWP|20
- PPTD410

訂購信息

7.5 Electrical Characteristics

V_I = 14 V, 1 mΩ < ESR < 20 Ω, T_J = –40°C to 150°C unless otherwise stated

PARAMETER		TEST CONDITIONS		MIN	TYP	MAX	UNIT
SUPPLY VOLTAGE AND CURRENT (V_IN)
V_I	Input voltage	Fixed 3.3-V output, I_O = 0 mA to 450 mA		4		40	V
		Fixed 5-V output, I_O = 0 mA to 450 mA		5.5		40
		Adjustable output, V_O ≤ 3.5 V, I_O = 0 mA to 450 mA		4		40
		Adjustable output, V_O ≥ 3.5 V, I_O = 0 mA to 450 mA		V_O + 0.5		40
I_Q	Quiescent current	V_I = 5.5 V to 40 V (fixed 5 V), 4 V to 40 V (fixed 3.3 V), EN = ON, I_O = 0.2 mA			15	25	µA
		V_I = 4 V to 40 V (adjustable version, V_O = 1.5 V), EN = ON, I_O = 0.2 mA			15	25
		V_I = 18.5 V to 40 V (adjustable version, V_O = 18 V), EN = ON, I_O = 0.2 mA			25	35
I_Sleep	Input sleep current	NO load current and EN = OFF				4	µA
I_EN	EN pin current	EN = 40 V				1	µA
Vbg	Band gap	Reference voltage for ADJ		–2%	1.233	2%	V
V_INUVLO	Undervoltage detection	Ramp V_I down until output is turned OFF				2.6	V
UVLO_Hys	Undervoltage detection hysteresis				1		V
ENABLE INPUT (EN)
V_IL	Logic input low level			0		0.4	V
V_IH	Logic input high level			1.7			V
REGULATED OUTPUT (V_OUT)
V_O	Regulated output⁽¹⁾	V_I = V_O + 0.5 V to 40 V and V_I ≥ 4 V, I_O = 0 mA to 450 mA		–2%		2%
ΔV_O(ΔVI)	Line regulation	V_I = V_O + 1 V to 40 V and V_I ≥ 4 V, I_O = 100 mA, ?V_O				10	mV
ΔV_O(ΔIL)	Load regulation	I_O = 1 mA to 450 mA, ?V_O				10	mV
V_dropout	Dropout voltage	V_I – V_O, I_O = 400 mA			240	450	mV
V_dropout	Dropout voltage	V_I – V_O, I_O = 200 mA			160	300	mV
I_O	Output current	V_O in regulation		0		450	mA
I_lreg-CL	Output current-limit	V_O short to ground		140		360	mA
I_lreg-CL	Output current-limit	V_O = V_O typical × 0.9		470		850	mA
PSRR	Power-supply ripple rejection⁽²⁾	I_L = 100 mA, C_O = 22 µF	Freq = 100 Hz		60		dB
PSRR	Power-supply ripple rejection⁽²⁾	I_L = 100 mA, C_O = 22 µF	Freq = 100 kHz		40		dB
RESET
V_OL	Reset pulled low	I_OL = 0.5 mA				0.4	V
I_OH	Reset pulled V_OUT through 10-kΩ resistor	Leakage current				1	µA
V_TH-(POR)	Power-on-reset threshold	V_O power-up set tolerance		89.6	91.6	93.6	% of V_OUT
V_hys	Hysteresis	V_O power-down set tolerance			2		% of V_OUT
RESET DELAY
I_Chg	Delay capacitor charging current	R_delay = 0 V		6	9.5	14	µA
V_th	Threshold to release RESET high				1		V
OPERATING TEMPERATURE RANGE
T_J	Junction temperature			–40		150	°C
T_sd	Junction shutdown temperature				175		°C
T_hys	Hysteresis of thermal shutdown				24		°C

(1) External resistor divider variation is not considered.

(2) Design information — not tested, ensured by characterization.

(3) This information only will NOT be tested in production. The equation is based on:
(C × 1) / (9.5 × 10^–6) = t_Delay (delay time)
Where
● C = delay capacitor value capacitance
● C range = 100 pf to 500 nF