ZHCSH45B June 2017 – October 2021 TPS7A83A
PRODUCTION DATA
- 1 特性
- 2 應用
- 3 說明
- 4 Revision History
- 5 說明（續）
- 6 Pin Configuration and Functions
-
7 Specifications
- 7.1 Absolute Maximum Ratings
- 7.2 ESD Ratings
- 7.3 Recommended Operating Conditions
- 7.4 Thermal Information
- 7.5 Electrical Characteristics: General
- 7.6 Electrical Characteristics: TPS7A8300A
- 7.7 Electrical Characteristics: TPS7A8301A
- 7.8 Typical Characteristics: TPS7A8300A
- 7.9 Typical Characteristics: TPS7A8301A
- 8 Detailed Description
-
9 Application and Implementation
- 9.1
Application Information
- 9.1.1
External Component Selection
- 9.1.1.1 Adjustable Operation
- 9.1.1.2 ANY-OUT Programmable Output Voltage
- 9.1.1.3 ANY-OUT Operation
- 9.1.1.4 Increasing ANY-OUT Resolution for LILO Conditions
- 9.1.1.5 Recommended Capacitor Types
- 9.1.1.6 Input and Output Capacitor Requirements (CIN and COUT)
- 9.1.1.7 Feed-Forward Capacitor (CFF)
- 9.1.1.8 Noise-Reduction and Soft-Start Capacitor (CNR/SS)
- 9.1.2 Start Up
- 9.1.3 AC and Transient Performance
- 9.1.4 DC Performance
- 9.1.5 Sequencing Requirements
- 9.1.6 Negatively Biased Output
- 9.1.7 Reverse Current
- 9.1.8 Power Dissipation (PD)
- 9.1.1
External Component Selection
- 9.2 Typical Application
- 9.1
Application Information
- 10Power Supply Recommendations
- 11Layout
- 12Device and Documentation Support
- 13Mechanical, Packaging, and Orderable Information
封裝選項
機械數據 (封裝 | 引腳)
散熱焊盤機械數據 (封裝 | 引腳)
訂購信息
8.3.2.2 Internal Sequencing
Controlling when a single power supply turns on can be difficult in a power distribution network (PDN) because of the high power levels inherent in a PDN, and the variations between the supplies. Figure 8-3 and Table 8-2 show how the LDO turn-on and turn-off times are set by the enable circuit (EN) and undervoltage lockout circuits (UVLO1,2(IN) and UVLOBIAS).
Figure 8-3 Simplified Turn-On
ControlTable 8-2 Internal Sequencing
Functionality Table
| INPUT VOLTAGE | BIAS VOLTAGE | ENABLE STATUS | LDO STATUS | ACTIVE DISCHARGE | POWER GOOD |
|---|---|---|---|---|---|
| VIN ≥ VUVLO_1,2(IN) | VBIAS ≥ VUVLO(BIAS) | EN = 1 | On | Off | PG = 1 when VOUT ≥ VIT(PG) |
| EN = 0 | Off | On | PG = 0 | ||
| VBIAS < VUVLO(BIAS) + VHYS(BIAS) | EN = don't care | Off | On (1) | ||
| VIN < VUVLO_1,2(IN) – VHYS1,2(IN) | BIAS = don't care | Off | |||
| IN = don't care | VBIAS ≥ VUVLO(BIAS) | Off |
(1) The active discharge remains on as long as VIN or VBIAS provide enough headroom for the discharge circuit to function.