SLVS389M September 2002 – September 2015 TPS786
PRODUCTION DATA.
- 1 Features
- 2 Applications
- 3 Description
- 4 Revision History
- 5 Pin Configuration and Functions
- 6 Specifications
- 7 Detailed Description
- 8 Application and Implementation
- 9 Power Supply Recommendations
- 10Layout
- 11Device and Documentation Support
- 12Mechanical, Packaging, and Orderable Information
封裝選項
機械數據 (封裝 | 引腳)
散熱焊盤機械數據 (封裝 | 引腳)
訂購信息
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)| MIN | MAX | UNIT | |
|---|---|---|---|
| VIN | –0.3 | 6 | V |
| VEN | –0.3 | VIN + 0.3 | V |
| VOUT | 6 | V | |
| Peak output current | Internally limited | ||
| Continuous total power dissipation | See Thermal Information | ||
| Junction temperature, TJ | –40 | 150 | °C |
| Storage temperature, Tstg | –65 | 150 | °C |
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
6.2 ESD Ratings
| VALUE | UNIT | ||||
|---|---|---|---|---|---|
| V(ESD) | Electrostatic discharge | Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1) | ±2000 | V | |
| Charged device model (CDM), per JEDEC specification JESD22-C101, all pins(2) | ±500 | ||||
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating junction temperature range (unless otherwise noted)| MIN | NOM | MAX | UNIT | ||
|---|---|---|---|---|---|
| VIN Input supply voltage | 2.7 | 5.5 | V | ||
| IOUT Output current | 0 | 1.5 | A | ||
| TJ Operating junction temperature | –40 | 125 | °C | ||
6.4 Thermal Information
| THERMAL METRIC(1)(2) | TPS786(3) | UNIT | |||
|---|---|---|---|---|---|
| DRB (SON) | DCQ (S0T-223) | KTT (TO-263) | |||
| 8 PINS | 6 PINS | 5 PINS | |||
| RθJA | Junction-to-ambient thermal resistance | 41.1 | 54.2 | 40.7 | °C/W |
| RθJC(top) | Junction-to-case (top) thermal resistance | 49.1 | 33.3 | 43.1 | °C/W |
| RθJB | Junction-to-board thermal resistance | 16.6 | 8.9 | 21.5 | °C/W |
| ψJT | Junction-to-top characterization parameter | 0.7 | 2.6 | 9.4 | °C/W |
| ψJB | Junction-to-board characterization parameter | 16.8 | 8.8 | 20 | °C/W |
| RθJC(bot) | Junction-to-case (bottom) thermal resistance | 5.2 | N/A | 2.1 | °C/W |
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.
(2) For thermal estimates of this device based on PCB copper area, see the TI PCB Thermal Calculator.
(3) Thermal data for the DRB, DCQ, and DRV packages are derived by thermal simulations based on JEDEC-standard methodology as specified in the JESD51 series. The following assumptions are used in the simulations:
-
i. DRB: The exposed pad is connected to the PCB ground layer through a 2×2 thermal via array.
. ii. DCQ: The exposed pad is connected to the PCB ground layer through a 3×2 thermal via array.
. iii. KTT: The exposed pad is connected to the PCB ground layer through a 5×4 thermal via array. -
i. DRB: The top and bottom copper layers are assumed to have a 20% thermal conductivity of copper representing a 20% copper coverage.
. ii. DCQ: Each of top and bottom copper layers has a dedicated pattern for 20% copper coverage.
. iii. KTT: The top and bottom copper layers are assumed to have a 20% thermal conductivity of copper representing a 20% copper coverage. - These data were generated with only a single device at the center of a JEDEC high-K (2s2p) board with 3 inches × 3 inches copper area. To understand the effects of the copper area on thermal performance, see the Power Dissipation and Estimating Junction Temperature sections of this data sheet.
6.5 Electrical Characteristics
Over recommended operating temperature range (TJ = –40°C to 125°C), VEN = VIN, VIN = VOUT(nom) + 1 V(1), IOUT = 1 mA,COUT = 10 μF, and CNR = 0.01 μF, unless otherwise noted. Typical values are at 25°C.
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |||
|---|---|---|---|---|---|---|---|---|
| Input voltage, VIN(1) | 2.7 | 5.5 | V | |||||
| Internal reference, VFB (TPS78601) | 1.200 | 1.225 | 1.250 | V | ||||
| Continuous output current IOUT | 0 | 1.5 | A | |||||
| Output voltage |
Output voltage range | TPS78601 | 1.225 | 5.5 – VDO | V | |||
| Accuracy | TPS78601(2) | 0 μA ≤ IOUT ≤ 1.5 A, VOUT + 1 V ≤ VIN ≤ 5.5 V(1) | (0.98)VOUT | VOUT | (1.02)VOUT | V | ||
| Fixed VOUT < 5 V | 0 μA ≤ IOUT ≤ 1.5 A, VOUT + 1 V ≤ VIN ≤ 5.5 V(1) | –2% | 2% | |||||
| Fixed VOUT = 5 V | 0 μA ≤ IOUT ≤ 1.5 A, VOUT + 1 V ≤ VIN ≤ 5.5 V(1) | –3% | 3% | |||||
| Output voltage line regulation (ΔVOUT%/VIN)(1) | VOUT + 1 V ≤ VIN ≤ 5.5 V | 5 | 12 | %/V | ||||
| Load regulation (ΔVOUT%/VOUT) | 0 μA ≤ IOUT ≤ 1.5 A | 7 | mV | |||||
| Dropout voltage(3)
VIN = VOUT(nom) – 0.1 V |
TPS78628 | IOUT = 1.5 A | 410 | 580 | mV | |||
| TPS78630 | IOUT = 1.5 A | 390 | 550 | |||||
| TPS78633 | IOUT = 1.5 A | 340 | 510 | |||||
| TPS78650 | IOUT = 1.5 A | 310 | 470 | |||||
| Output current limit | VOUT = 0 V | 2.4 | 4.2 | A | ||||
| Ground pin current | 0 μA ≤ IOUT ≤ 1.5 A | 260 | 385 | μA | ||||
| Shutdown current(4) | VEN = 0 V, 2.7 V ≤ VIN ≤ 5.5 V | 0.07 | 1 | μA | ||||
| FB pin current | VFB = 1.225 V | 1 | μA | |||||
| Power-supply ripple rejection | TPS78630 | f = 100 Hz, IOUT = 10 mA | 59 | dB | ||||
| f = 100 Hz, IOUT = 1.5 A | 52 | |||||||
| f = 10 kHz, IOUT = 1.5 A | 49 | |||||||
| f = 100 kHz, IOUT = 1.5 A | 32 | |||||||
| Output noise voltage (TPS78630) | BW = 100 Hz to 100 kHz, IOUT = 1.5 A |
CNR = 0.001 μF | 66 | μVRMS | ||||
| CNR = 0.0047 μF | 51 | |||||||
| CNR = 0.01 μF | 49 | |||||||
| CNR = 0.1 μF | 48 | |||||||
| Time, start-up (TPS78630) | RL = 2 Ω, COUT = 1 μF | CNR = 0.001 μF | 50 | μs | ||||
| CNR = 0.0047 μF | 75 | |||||||
| CNR = 0.01 μF | 110 | |||||||
| High-level enable input voltage | 2.7 V ≤ VIN ≤ 5.5 V | 1.7 | VIN | V | ||||
| Low-level enable input voltage | 2.7 V ≤ VIN ≤ 5.5 V | 0 | 0.7 | V | ||||
| EN pin current | VEN = 0 | –1 | 1 | μA | ||||
| UVLO threshold | VCC rising | 2.25 | 2.65 | V | ||||
| UVLO hysteresis | 100 | mV | ||||||
(1) Minimum VIN = VOUT + VDO or 2.7 V, whichever is greater. The TPS78650 is tested at VIN = 5.5 V.
(2) Tolerance of external resistors not included in this specification.
(3) Dropout is not measured for TPS78618 or TPS78625 because minimum VIN = 2.7 V.
(4) For adjustable version, this applies only after VIN is applied; then VEN transitions high to low.
6.6 Typical Characteristics
