ZHCSOL0D December 2008 – November 2023 TPS714
PRODUCTION DATA
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | ||
|---|---|---|---|---|---|---|---|
| VIN | Input voltage range (1) | IO = 10 mA | 2.5 | 10 | V | ||
| IO = 80mA | 3 | 10 | |||||
| VOUT | Output voltage range (TPS71401)(1) | VFB | 8.8 | V | |||
| VFB | Internal reference (legacy chip) (TPS71401)(1) | 1.12 | 1.2 | 1.24 | V | ||
| Internal reference (new chip) (TPS71401)(1) | 1.16 | 1.2 | 1.24 | ||||
| VOUT | Accuracy (1) | TPS71433 over VIN, IOUT and Temp | 4.3 V ≤ VIN ≤ 10 V, 1 mA ≤ IOUT ≤ 80 mA | 3.135 | 3.3 | 3.465 | V |
| IGND | Ground pin current (legacy chip)(3) | 1 mA ≤ IOUT ≤ 80mA, TJ = –40°C to 85°C | 3.2 | 4.2 | μA | ||
| 1 mA ≤ IOUT ≤ 80mA | 3.2 | 5.8 | |||||
| 1 mA ≤ IOUT ≤ 80mA, VIN = 10 V | 7.4 | ||||||
| Ground pin current (new chip)(3) | 1 mA ≤ IOUT ≤ 80mA, TJ = –40°C to 85°C | 3.2 | 4.1 | ||||
| 1 mA ≤ IOUT ≤ 80mA | 3.2 | 4.3 | |||||
| 1 mA ≤ IOUT ≤ 80mA, VIN = 10 V | 4.5 | ||||||
| ΔVOUT(ΔIOUT) | Load regulation | IOUT = 1 mA to 80 mA | 30 | mV | |||
| ΔVOUT(ΔVIN) | Output voltage line regulation (1) | VOUT + 1 V < VIN ≤ 10 V | 5 | mV | |||
| IFB BIAS | Feedback pin bias current | IOUT = 0 mA, VIN = 3V to 10V, VOUT = 1.2V | 2 | nA | |||
| Vn | Output noise voltage (legacy chip) | BW = 200 Hz to 100 kHz, COUT = 10 μF, IOUT = 50 mA |
575 | μVrms | |||
| Output noise voltage (new chip) | BW = 200 Hz to 100 kHz, COUT = 10 μF, IOUT = 50 mA |
425 | |||||
| ICL | Output current limit (legacy chip) | VOUT = 0 V | 100 | 1100 | mA | ||
| Output current limit (new chip) | VOUT = 0 V, VIN ≥ 3.5 V | 160 | 500 | ||||
| Output current limit (new chip) | VOUT = 0 V, VIN < 3.5 V | 90 | 500 | ||||
| VDO | Dropout voltage (legacy chip) | VIN = VOUT(nom) – 0.1 V, IOUT = 80 mA | 670 | 1300 | mV | ||
| Dropout voltage (new chip) | VIN = VOUT(nom) – 0.1 V, IOUT = 80 mA | 670 | 900 | ||||