ZHCSI58C October 2009 – May 2018 TPS65720 , TPS65721
PRODUCTION DATA.
- 1 特性
- 2 應用
- 3 說明
- 4 修訂歷史記錄
- 5 Device Options
- 6 Pin Configuration and Functions
- 7 Specifications
-
8 Detailed Description
- 8.1 Overview
- 8.2 Functional Block Diagrams
- 8.3
Feature Description
- 8.3.1 Battery Charger and Power Path
- 8.3.2 Power-Path Management
- 8.3.3 Battery Charging
- 8.3.4 Thermal Regulation and Thermal Shutdown
- 8.3.5 Battery Pack Temperature Monitoring
- 8.3.6 DCDC1 Converter
- 8.3.7 Power Save Mode
- 8.3.8 Short-Circuit Protection
- 8.3.9 Thermal Shutdown
- 8.3.10 LDO1
- 8.4 Device Functional Modes
- 8.5 Programming
- 8.6
Register Maps
- 8.6.1 CHGSTATUS Register Address: 01h (read only)
- 8.6.2 CHGCONFIG0 Register Address: 02h (read/write)
- 8.6.3 CHGCONFIG1 Register Address: 03h (read/write)
- 8.6.4 CHGCONFIG2 Register Address: 04h (read/write)
- 8.6.5 CHGCONFIG3 Register Address: 05h (read/write)
- 8.6.6 CHGSTATE Register Address: 06h (read only)
- 8.6.7 DEFDCDC1 Register Address: 07h (read/write)
- 8.6.8 LDO_CTRL Register Address: 08h (read/write)
- 8.6.9 CONTROL0 Register Address: 09h (read/write)
- 8.6.10 CONTROL1 Register Address: 0Ah (read/write)
- 8.6.11 GPIO_SSC Register Address: 0Bh (read/write)
- 8.6.12 GPIODIR Register Address: 0Ch (read/write)
- 8.6.13 IRMASK0 Register Address: 0Dh (read/write)
- 8.6.14 IRMASK1 Register Address: 0Eh (read/write)
- 8.6.15 IRMASK2 Register Address: 0Fh (read/write)
- 8.6.16 IR0 Register Address: 10h (read only)
- 8.6.17 IR1 Register Address: 11h (read)
- 8.6.18 IR2 Register Address: 12h (read)
- 9 Application and Implementation
- 10Power Supply Recommendations
- 11Layout
- 12器件和文檔支持
- 13機械、封裝和可訂購信息
9.2.2.1.2 LDO1
For TPS65720 and TPS657201, the default output voltage is 1.85 V while the default output voltage is 2.85 V for TPS657202, defined by register LDO_CTRL. The programmable voltage range is 0.8 V to 3.3 V. A voltage change to a higher voltage needs to be accomplished in steps of 8% maximum otherwise the power-good comparator will detect a too low voltage, will trigger and generate a reset. There is no limitation in programming output voltages to lower values.
For the TPS65721, the output voltage for LDO1 is externally adjustable using a resistor-divider at pin FB_LDO1. The feedback voltage is 0.8 V and the total resistance of the voltage divider should be kept in the 100-kΩ to
1-MΩ range. A feed-forward capacitor in parallel to the resistor from Vout to FB_LDO1 is required. It´s value should be based on transient performance and will be in the range from 4.7 pF to 22 pF.
The output voltage with an internal reference voltage VFB-LDO1 = 0.8 V is calculated by Equation 4:
Table 4. Typical Resistor Values
| OUTPUT VOLTAGE | R3 | R4 | NOMINAL VOLTAGE |
|---|---|---|---|
| 3.3 V | 470 kΩ | 150 kΩ | 3.31 V |
| 1.85 V | 200 kΩ | 150 kΩ | 1.86 V |
| 1.8 V | 300 kΩ | 240 kΩ | 1.80 V |