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ZHCS259B July 2011 – August 2015 TPS65142

PRODUCTION DATA.

封裝選項

機械數據 (封裝 | 引腳)

RTG|32
- MPQF247A

散熱焊盤機械數據 (封裝 | 引腳)

RTG|32
- QFND245C

訂購信息

6 Specifications

Absolute Maximum Ratings⁽¹⁾

over operating free-air temperature range (unless otherwise noted)

		VALUE		UNIT
		MIN	MAX	UNIT
Voltage	Input voltage range	–0.3	6.5	V
	FB, FREQ, VDPM, VFLK, VDET, FBN, XAO	–0.3	6.5	V
	SW, OPI, OPO, SUP, DRVP, DRVN, EN, DCTRL, IFB1 to IFB6	–0.3	20	V
	REF, FBP and ISET	–0.3	3.6	V
	VGH, VGHM, RE	–0.3	35	V
	VBAT	–0.3	24	V
	BL_SW and VO	–0.3	40	V
Continuous power dissipation		See the Thermal Information Table
Storage temperature range		–65	150	°C

(1) Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

6.1 ESD Ratings

			VALUE	UNIT
V_(ESD)	Electrostatic discharge	Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001⁽¹⁾	±2000	V
V_(ESD)	Electrostatic discharge	Charged-device model (CDM), per JEDEC specification JESD22-C101⁽²⁾	±500	V

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process..

6.2 Recommended Operating Conditions

		MIN	TYP	MAX	UNIT
V_IN	Input voltage range	2.3		6	V
V_S	AVDD Boost output voltage range⁽¹⁾			16.5	V
V_GH	Positive charge pump output voltage range			32	V
V_BAT	Battery voltage range	4.5		24	V
V_O	WLED boost converter output voltage			38	V
V_GL	Negative charge pump output voltage range	–14			V
L₁	Inductor for the AVDD boost converter⁽²⁾	4.7		10	µH
L₂	Inductor for the WLED boost converter	4.7		10	µH
C_IN	Input decoupling capacitor	1			µF
C_O1	Output decoupling capacitor of the AVDD boost converter		20		µF
C_O2	Output decoupling capacitor of the WLED boost converter	2.2		10	µF
T_A	Operating ambient temperature	–40		85	°C
T_J	Operating junction temperature	–40		125	°C

(1) Maximum output voltage is limited by the overvoltage protection and not the maximum power switch rating

(2) Refer to application section for further information.

6.3 Thermal Information

THERMAL METRIC⁽¹⁾		WQFN	UNITS
THERMAL METRIC⁽¹⁾		RTG (32 PINS)	UNITS
R_θJA	Junction-to-ambient thermal resistance	35.4	°C/W
R_θJCtop	Junction-to-case (top) thermal resistance	19.9
R_θJB	Junction-to-board thermal resistance	5.6
ψ_JT	Junction-to-top characterization parameter	0.2
ψ_JB	Junction-to-board characterization parameter	5.4
R_θJCbot	Junction-to-case (bottom) thermal resistance	1.7

(1) 有關傳統和新熱指標的更多信息，請參見《半導體和 IC 封裝熱指標》應用報告，SPRA953。

6.4 Electrical Characteristics

V_IN = 3.3 V, V_S = 9V, V_GH = 20 V, V_BAT = 10.8V, I_ISET = 15µA, V_IFBx = 0.5V, EN = V_IN, T_A = –40°C to 85°C, typical values are at T_A = 25°C (unless otherwise noted)

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
SUPPLY
I_Q(IN)	Operating quiescent current into VIN	Device not switching		0.17	0.5	mA
I_Q(VGH)	Operating quiescent current into VGH	V_GH = 20 V, VFLK not oscillating		22	40	µA
I_Q(SUP)	Operating quiescent current into SUP	Device not switching. V_S = 9 V, EN = high		2.8		mA
I_Q(SUP)	Operating quiescent current into SUP	Device not switching. V_S = 9 V, EN = GND		2.5		mA
I_SD(VIN)	Shutdown current into VIN	V_IN = 1.8 V, V_S = GND		20	33	µA
I_SD(VGH)	Shutdown current into VGH	V_IN = 1.8 V, V_GH = 32 V		30	50	µA
I_SD(SUP)	Shutdown current into SUP	V_IN = 1.8 V, V_S = 16.5 V		3	5	µA
I_Q(BAT)	VBAT pin quiescent current	WLED boost regulator switching, no load			0.2	mA
I_SD(BAT)	VBAT pin shutdown current	EN = GND			18	µA
I_Q(VO)	VO pin quiescent current	V_O = 35 V			75	µA
UVLO	VIN under voltage lockout threshold	V_IN falling	1.9		2.1	V
	VIN under voltage lockout threshold	V_IN rising			2.2	V
	VBAT under voltage lockout threshold	V_BAT rising			4.45	V
	VBAT under voltage lockout threshold	V_BAT falling	3.9			V
	UVLO voltage of WLED control circuit			2.2	2.5	V
LOGIC SIGNALS FREQ, VFLK, EN, DCTRL
V_IH	Logic high input voltage	V_IN = 2.5 V to 6 V	2			V
V_IL	Logic low input voltage	V_IN = 2.5 V to 6 V			0.5	V
I_LKG	Input leakage current of VFLK pin	VFLK = 6 V, FREQ = GND			0.1	µA
R_PD	Pull-down resistance for EN and DCTRL pins	EN = DCTRL = 3.3 V	400	800	1600	kΩ
AVDD BOOST CONVERTER
V_S	Output voltage boost⁽¹⁾		7		16.5	V
V_OVP	Overvoltage protection	VS rising	16.9	18	19	V
V_FB	Feedback regulation voltage	T_A = –40°C to 85°C	1.226	1.24	1.254	V
V_FB	Feedback regulation voltage	T_A = 25°C	1.23	1.24	1.25	V
I_FB	Feedback input bias current	V_FB = 1.240 V			0.1	µA
r_DS(ON)	N-channel MOSFET on-resistance	V_IN = V_GS = 5 V, I_SW = current limit		0.13	0.38	Ω
r_DS(ON)	N-channel MOSFET on-resistance	V_IN = V_GS = 3.3 V, I_SW = current limit		0.15	0.44	Ω
I_Lkg(SW)	AVDD Boost converter SW leakage current	V_IN = 1.8 V, V_SW = 17 V, Device not switching			30	µA
I_LIM	N-Channel MOSFET current limit	VIN = 2.5 V to 6 V	1.8	2.5	3.2	A
I_LIM	N-Channel MOSFET current limit	VIN = 2.3 V to 2.5 V	1.5			A
f_BOOST	Switching frequency	FREQ = high	0.9	1.2	1.5	MHz
f_BOOST	Switching frequency	FREQ = low	470	625	780	kHz
T_SS	Softstart time	FREQ = high, L₁ = 6.8 µH, C_O1 = 2 0µF and 10 mA load current		2		ms
	Line regulation	V_IN = 2.5 V … 6 V, I_OUT = 10 mA		0.008		%/V
	Load regulation	I_OUT = 0 mA …500 mA		0.15		%/A
VGH REGULATOR
f_SWP	Switching frequency		0.5 x f_BOOST			MHz
V_FBP	Reference voltage of feedback	T_A= –40°C to 85°C	1.210	1.240	1.270	V
V_FBP	Reference voltage of feedback	T_A = 25°C	1.221	1.240	1.259
I_FBP	Feedback input bias current	V_FBP = 1.240 V			0.1	µA
r_DS(ON)P1	DRVP R_DS(ON) (PMOS)	V_S = 9 V, I_(DRVP) = 40 mA		8	20	Ω
r_DS(ON)N1	DRVP R_DS(ON) (NMOS)	V_S = 9 V, I_(DRVP) = –40 mA		3	10	Ω
VGL REGULATOR
f_SWN	Switching frequency		0.5 x f_BOOST			MHz
V_REF	Reference voltage		3.05	3.12	3.18	V
V_FBN	Reference voltage of feedback		–48	0	48	mV
I_FBN	Feedback input bias current	V_FBN = 0 V			0.1	µA
r_DS(ON)P2	DRVN R_DS(ON) (PMOS)	V_S = 9 V, I_(DRVN) = 40 mA		8	20	Ω
r_DS(ON)N2	DRVN R_DS(ON) (NMOS)	V_S = 9 V, I_(DRVN) = –40 mA		3	10	Ω
GATE VOLTAGE SHAPING VGHM
I_(DPM)	Capacitor charge current VDPM pin		17	20	23	µA
r_DS(ON)M1	VGH to VGHM r_DS(ON) (M1 PMOS)	VFLK = low, I_(VGHM) = 20 mA		13	25	Ω
r_DS(ON)M2	VGHM to RE r_DS(ON) (M2 PMOS)	VFLK = high, I_(VGHM) = 20 mA, VGHM = 7.5 V		13	25	Ω
RESET
V_IN(DET)	VIN voltage range for reset detection		1.6		6	V
V_(DET)	Reset IC threshold	Falling	1.074	1.1	1.126	V
V_{(DET_HYS)}	Reset IC threshold hysteresis			65		mV
I_{(DET_B)}	Reset IC input bias current	V_(DET) = 1.1 V			0.1	µA
I_XAO	Reset sink current capability⁽²⁾	V_{(XAO_ON)} = 0.5 V	1			mA
I_LKG(XAO)	Reset leakage current	V_(XAO) = V_IN = 3.3 V			2	µA
VCOM BUFFER
V_SUP	SUP input supply range⁽³⁾		7		16.5	V
I_B	Input bias current	V_CM = V_(OPI) = V_SUP/2 = 4.5 V	–1		1	µA
V_CM	Common Mode Input Voltage Range	V_OFFSET = 10 mV, I_(OPO) = 10 mA	2		V_S – 2	V
CMRR	Common Mode Rejection Ratio⁽⁴⁾	V_CM = V_(OPI) = V_(SUP)/2 = 4.5 V, 1 MHz		66		dB
A_VOL	Open Loop Gain⁽⁴⁾	V_CM = V_(OPI) = V_(SUP)/2 = 4.5 V, no load		90		dB
V_OL	Output Voltage Swing Low	I_(OPO) = 10 mA		0.10	0.25	V
V_OH	Output Voltage Swing High	I_(OPO) = 10 mA	V_S – 0.8	V_S – 0.65		V
I_SC	Short Circuit Current	Source (V_(OPI) = 4.5V, V_(OPO) = GND)	150			mA
I_SC	Short Circuit Current	Sink (V_(OPI) = 4.5 V, V_(OPO) = 9 V)	150			mA
I_O	Output Current	Source (V_(OPI) = 4.5 V, V_(OFFSET) = 15 mV)		150		mA
I_O	Output Current	Sink (V_(OPI) = 4.5 V, V_(OFFSET) = 15 mV)		140		mA
PSRR	Power Supply Rejection Ratio⁽⁴⁾			40		dB
SR	Slew Rate⁽⁴⁾	A_V= 1, V_(OPI) = 2 V_PP		40		V/µs
BW	–3 dB Bandwidth⁽⁴⁾	A_V = 1, V_(OPI)= 60 mV_PP		50		MHz
WLED CURRENT REGULATION
V_(ISET)	ISET pin voltage		1.204	1.229	1.253	V
K_(ISET)	Current multiple I_OUT/ISET ⁽⁵⁾	ISET current = 20 µA		1000
I_FB	Current accuracy ⁽⁵⁾	ISET current = 20 µA	19.4	20	20.6	mA
K_m	(I_max–I_min)/I_AVG	ISET current = 20 µA		1%	2.5%
I_LKG	IFB pin leakage current	IFB voltage = 20 V on all pins			3	µA
I_{(IFB_MAX)}	Current sink max output current	IFB = 500 mV	28			mA
WLED BOOST OUTPUT REGULATION
V_{(IFB_L)}	V_O dial up threshold	Measured on V_{(IFB) min}		400		mV
V_{(IFB_H)}	V_O dial down threshold	Measured on V_{(IFB) min}		700		mV
V_{(reg_L)}	Minimum V_O regulation voltage				16	V
V_O(step)	V_O stepping voltage			100	150	mV
WLED BOOST REGULATOR POWER SWITCH
R_{(PWM_SW)}	PWM FET on-resistance			0.2	0.45	Ω
I_{(LN_NFET)}	PWM FET leakage current	V_{(BL_SW)} = 35 V, T_A= 25°C			1	µA
WLED OSCILLATOR
f_S	Oscillator frequency		0.9	1.0	1.2	MHz
D_max	Maximum duty cycle of WLED Boost	IFB = 0 V	89%	94%
D_min	Minimum duty cycle of WLED Boost				7%
CURRENT LIMIT, OVER VOLTAGE AND SHORT CIRCUIT PROTECTIONS
I_LIM	N-Channel MOSFET current limit	D = D_MAX	1.5		3	A
V_OVP	VO overvoltage threshold	Measured on the VO pin	38	39	40	V
V_OVP(IFB)	IFB overvoltage threshold	Measured on the IFBx pin	15	17	20	V
V_SC	Short circuit detection threshold	V_BAT –V_O, V_O ramp down		1.7	2.5	V
V_SC(dly)	Short circuit detection delay during start up			32		ms
THERMAL SHUTDOWN
T_SD	Thermal shutdown	Temperature rising		150		°C
T_SDHYS	Thermal shutdown hysteresis			14		°C