ZHCSBD3D July 2013 – August 2019 TPS63050 , TPS63051
PRODUCTION DATA.
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |||
|---|---|---|---|---|---|---|---|---|
| SUPPLY | ||||||||
| VIN | Input voltage range | 2.5 | 5.5 | V | ||||
| VIN_Min | Minimum input voltage to turn on in full load | IOUT = 500 mA | 2.7 | V | ||||
| IOUT | Output current(3) | ILIM0 = VIH, ILIM1 = VIH, | 500 | mA | ||||
| IQ | Quiescent current (2) | VIN | IOUT = 0 mA, EN = VIN = 3.6 V,
VOUT = 3.3 V |
43 | 65 | μA | ||
| VOUT | IOUT = 0 mA, EN = VIN = 3.6 V,
VOUT = 3.3 V |
10 | ||||||
| Isd | Shutdown current (2) | EN = 0 V | 0.1 | 1 | μA | |||
| UVLOTH | Undervoltage lockout threshold | VIN falling | 1.6 | 1.7 | 1.8 | V | ||
| UVLOhys | Undervoltage lockout hysteresis | 200 | mV | |||||
| TSD | Thermal shutdown | Temperature rising | 140 | °C | ||||
| TSD(hys) | Thermal shutdown hysteresis | 20 | °C | |||||
| LOGIC SIGNALS EN, ILIM0, ILIM1 | ||||||||
| VIH | High level input voltage | VIN = 2.5 V to 5.5 V | 1.2 | V | ||||
| VIL | Low level voltage Input Voltage | VIN = 2.5 V to 5.5 V | 0.3 | V | ||||
| Ilkg | Input leakage current | PFM / PWM, EN, ILIM0, ILIM1 = GND or VIN | 0.01 | 0.1 | μA | |||
| POWER GOOD | ||||||||
| VOL | Low level voltage | Isink = 100 μA | 0.3 | V | ||||
| IPG | PG sinking current | V = 0.3 V | 0.1 | mA | ||||
| Ilkg | Input leakage current | VPG = 3.6 V | 0.01 | 0.1 | μA | |||
| OUTPUT | ||||||||
| VOUT | Output voltage range | 2.5 | 5.5 | V | ||||
| VFB | TPS63050 feedback regulation voltage | 0.8 | V | |||||
| VFB | TPS63050 feedback voltage accuracy | PWM mode | –1.1% | 1.1% | ||||
| VFB | TPS63050 feedback voltage accuracy(1) | PFM mode | –1% | 3% | ||||
| VOUT | TPS63051 output voltage accuracy | PWM mode | 3.27 | 3.3 | 3.34 | V | ||
| VOUT | TPS63051 output voltage accuracy(1) | PFM mode | 3.27 | 3.3 | 3.39 | V | ||
| IPWM->PFM | Minimum output current to enter PFM mode | VIN = 3 V; VOUT = 3.3 V | 150 | mA | ||||
| IFB | TPS63050 feedback input bias current | VFB = 0.8 V | 10 | 100 | nA | |||
| RDS(on) | Input high-side FET on-resistance | ISW = 500 mA | 145 | mΩ | ||||
| Output high-side FET on-resistance | ISW = 500 mA | 95 | mΩ | |||||
| Input low-side FET on-resistance | ISW = 500 mA | 170 | mΩ | |||||
| Output low-side FET on-resistance | ISW = 500 mA | 115 | mΩ | |||||
| IIN_MAX | Input current-limit boost mode | ILIM0 = VIH, ILIM1 = VIH,VIN = 2.7 V to 3 V, VOUT = 3 V | 480 | 1240 | mA | |||
| ILIM0 = VIH, ILIM1 = VIH,VIN = 2.7 V to 3.3 V, VOUT = 3.3 V, | 550 | 1400 | mA | |||||
| ILIM0 = VIH, ILIM1 = VIH,VIN = 2.7 V to 4.5 V, VOUT = 4.5 V, | 630 | 1950 | mA | |||||
| ISS_IN | Programmable inrush current limit(4) | ILIM0 = VIL, ILIM1 = VIL,
VIN = 3 V,VOUT = 3.3 V, (Available for DBGA only) |
0.4×IIN_MAX | mA | ||||
| ILIM0 = VIH, ILIM1 = VIL,
VIN = 3 V,VOUT = 3.3 V, (Available for DBGA only) |
0.5×IIN_MAX | |||||||
| ILIM0 = VIL, ILIM1 = VIH,
VIN = 3 V,VOUT = 3.3 V |
0.65×IIN_MAX | |||||||
| ILIM0 = VIH, ILIM1 = VIH,
VIN = 3 V,VOUT = 3.3 V |
IIN_MAX | |||||||
| ISS | Soft-start current TPS63051 | 1 | μA | |||||
| ISS | Soft-start current TPS63050 | 3.2 | μA | |||||
| Line regulation | VIN = 2.5 V to 5.5 V, IOUT = 500 mA, PWM mode | 0.963 | mV/V | |||||
| Load regulation | VIN = 3.6 V, IOUT = 0 mA to 500 mA, PWM mode | 4 | mV/A | |||||