ZHCSEQ2A February 2016 – February 2016 TPS62480
PRODUCTION DATA.
- 1 特性
- 2 應用范圍
- 3 說明
- 4 修訂歷史記錄
- 5 Pin Configuration and Functions
- 6 Specifications
- 7 Detailed Description
- 8 Application and Implementation
- 9 Power Supply Recommendations
- 10Layout
- 11器件和文檔支持
- 12機械、封裝和可訂購信息
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)| MIN | MAX | UNIT | ||
|---|---|---|---|---|
| Pin Voltage Range(2) | VIN | -0.3 | 6 | V |
| SW1, SW2 | -0.3 | VIN+0.3 | V | |
| EN, VSEL, MODE, SS/TR, PG, TG | -0.3 | 6 | V | |
| FB, RS | -0.3 | 3 | V | |
| Power Good / Thermal Good Sink Current | PG, TG | 10 | mA | |
| Operating Junction Temperature Range, TJ | -40 | 150 | °C | |
| Storage Temperature Range, Tstg | -65 | 150 | °C | |
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltages are with respect to network ground terminal.
6.2 ESD Ratings
| VALUE | UNIT | |||
|---|---|---|---|---|
| V(ESD) | Electrostatic discharge | Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1) | ±1000 | V |
| Charged device model (CDM), per JEDEC specification JESD22-C101, all pins(2) | ±500 | |||
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating junction temperature range (unless otherwise noted)| MIN | TYP | MAX | UNIT | ||
|---|---|---|---|---|---|
| Supply Voltage Range, VIN | 2.4 | 5.5 | V | ||
| Output Voltage Range, VOUT | 0.6 | 5.5 | V | ||
| Maximum Output Current, IOUT | 6 | A | |||
| Operating junction temperature, TJ | –40 | 125 | °C | ||
6.4 Thermal Information
| THERMAL METRIC(1) | TPS62480 | UNIT | ||
|---|---|---|---|---|
| RNC 16 PINS | ||||
| JEDEC with thermal vias(2) | JEDEC standard | |||
| RθJA | Junction-to-ambient thermal resistance | 26.4 | 56.4 | °C/W |
| RθJC(top) | Junction-to-case (top) thermal resistance | 32.2 | 32.2 | °C/W |
| RθJB | Junction-to-board thermal resistance | 10.2 | 26.5 | °C/W |
| ψJT | Junction-to-top characterization parameter | 0.9 | 1.3 | °C/W |
| ψJB | Junction-to-board characterization parameter | 10.2 | 26.5 | °C/W |
| RθJC(bot) | Junction-to-case (bottom) thermal resistance | - | - | °C/W |
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
(2) See the Layout section.
6.5 Electrical Characteristics
over operating junction temperature range (TJ = –40°C to 125°C) and VIN = 2.4 V to 5.5 V. Typical values at VIN = 3.6 V and TJ = 25°C (unless otherwise noted).| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | ||
|---|---|---|---|---|---|---|---|
| SUPPLY | |||||||
| VIN | Input Voltage Range | VIN rising | 2.6 | 5.5 | V | ||
| VIN falling | 2.4 | 5.5 | |||||
| IQ | Operating Quiescent Current | EN = High, VIN ≥ 3 V, IOUT = 0 mA, device not switching, TJ = -40°C to +85°C |
23 | 38 | µA | ||
| 100% Mode operation | 3.5 | 6.5 | mA | ||||
| ISD | Shutdown Current | EN = Low (≤ 0.3 V), TJ = -40°C to +85°C | 0.5 | 18.5 | µA | ||
| VUVLO | Undervoltage Lockout Threshold | Falling Input Voltage | 2.2 | 2.3 | 2.4 | V | |
| Hysteresis | 200 | mV | |||||
| TSD | Thermal Shutdown Temperature | PWM Mode, Rising Junction Temperature | 160 | °C | |||
| Thermal Shutdown Hysteresis | PWM Mode | 10 | |||||
| CONTROL (EN, VSEL, MODE, SS/TR, PG, TG) | |||||||
| VH | Input Threshold Voltage (EN, VSEL, MODE) | to ensure High Level | 1.2 | V | |||
| VL | Input Threshold Voltage (EN, VSEL, MODE) | to ensure Low Level | 0.4 | ||||
| ILKG(EN) | Input Leakage Current (EN) | EN = VIN or GND | 10 | 200 | nA | ||
| ILKG(MODE) | Input Leakage Current (MODE, VSEL) | 10 | 200 | nA | |||
| ISS/TR | SS/TR pin source current | 4.7 | 5.25 | 5.8 | µA | ||
| VTH(TG) | Thermal Good Threshold Temperature | PWM Mode | 120 | °C | |||
| Thermal Good Hysteresis | PWM Mode | 10 | |||||
| VTH(PG) | Power Good Threshold Voltage | Rising (%VOUT) | 93% | 96% | 99% | ||
| Falling (%VOUT) | 89% | 92% | 95% | ||||
| VL(PG) | Output Low Threshold (PG, TG) | IPG = -2 mA | 0.4 | V | |||
| ILKG(PG) | Input Leakage Current (PG) | 2 | 700 | nA | |||
| ILKG(TG) | Input Leakage Current (TG) | 2 | 100 | nA | |||
| tSS | Internal Soft-Start Time | SS/TR = VIN or floating | 80 | µs | |||
| tDELAY | Time from EN rising until start switching | 100 | 200 | 400 | µs | ||
| POWER SWITCH | |||||||
| RDS(ON) | High-Side MOSFET ON-Resistance |
VIN ≥ 3 V | Phase1 | 36 | 98 | mΩ | |
| Phase2 | |||||||
| Low-Side MOSFET ON-Resistance |
Phase1 | 29 | 72 | mΩ | |||
| Phase2 | |||||||
| ILIM | High-Side MOSFET Current Limit |
per phase | 4.3 | 5.0 | 5.8 | A | |
| OUTPUT | |||||||
| VREF | Internal Reference Voltage | 0.6 | V | ||||
| ILKG(FB) | Input Leakage Current (FB) | EN = High | VFB = 0.6 V | 1 | 65 | nA | |
| ILKG(RS) | Input Leakage Current (RS) | VSEL = Low, VRS = 0.6 V | 1 | 65 | nA | ||
| RRS | Internal resistance (RS to GND) | VSEL = High, IRS = 1 mA | 10 | 50 | Ω | ||
| VOUT | Output Voltage Range | VIN ≥ VOUT | 0.6 | 5.5 | V | ||
| VOUT | Feedback Voltage Accuracy | PWM Mode, VIN ≥ VOUT + 1 V |
TJ = –20°C to 85°C | -1% | 1% | ||
| TJ = –40°C to 125°C | -1.4% | 1.3% | |||||
| VOUT | Feedback Voltage Accuracy | Power Save Mode, L = 0.47 µH, COUT = 4 x 22 µF(1) |
-1.4% | 2.5% | |||
| Output Discharge Current(2) | EN = Low, VOUT = 2.5 V | 120 | mA | ||||
| Load Regulation | VOUT = 1.8 V, PWM mode operation | 0.02 | %/A | ||||
| Line Regulation | 2.6 V ≤ VIN ≤ 5.5 V, VOUT = 1.8 V, IOUT = 6 A, PWM mode operation | 0.02 | %/V | ||||
(1) The output voltage accuracy in Power Save Mode can be improved by increasing the output capacitor value, reducing the output voltage ripple.
(2) For detailed information on output discharge see Active Output Discharge.
6.6 Typical Characteristics
