SLVSC52B July 2013 – September 2015 TPS62152-Q1
PRODUCTION DATA.
| MIN | MAX | UNIT | ||
|---|---|---|---|---|
| Pin voltage range(2) | AVIN, PVIN | –0.3 | 20 | V |
| EN, SS/TR | –0.3 | VIN + 0.3 | ||
| SW | –0.3 | VIN + 0.3 | ||
| DEF, FSW, FB, PG, VOS | –0.3 | 7 | ||
| Power-good sink current | PG | 10 | mA | |
| Operating junction temperature, TJ | –40 | 125 | °C | |
| Storage temperature, Tstg | –65 | 150 | °C | |
| VALUE | UNIT | ||||
|---|---|---|---|---|---|
| V(ESD) | Electrostatic discharge | Human body model (HBM), per AEC Q100-002(1) | ±2000 | V | |
| Charged device model (CDM), per AEC Q100-011 | All pins | ±500 | |||
| Corner pins (1, 4, 5, 8, 9, 12, 13, 16) | ±750 | ||||
| MIN | MAX | UNIT | |||
|---|---|---|---|---|---|
| VIN | Supply voltage at AVIN and PVIN(1) | 4 | 17 | V | |
| CIN | Input filter capacitor | 10 | µF | ||
| COUT | Output buffer capacitor | 10 | µF | ||
| LOUT | Output inductor | 1 | 3.3 | µH | |
| TA | Operating free air temperature | –40 | 125 | °C | |
| THERMAL METRIC(1) | TPS62152-Q1 | UNIT | |
|---|---|---|---|
| RGT (VQFN) | |||
| 16 Pins | |||
| RθJA | Junction-to-ambient thermal resistance | 45 | °C/W |
| RθJC(top) | Junction-to-case (top) thermal resistance | 51.6 | °C/W |
| RθJB | Junction-to-board thermal resistance | 17.4 | °C/W |
| ψJT | Junction-to-top characterization parameter | 0.9 | °C/W |
| ψJB | Junction-to-board characterization parameter | 17.4 | °C/W |
| RθJC(bot) | Junction-to-case (bottom) thermal resistance | 4.4 | °C/W |
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | ||
|---|---|---|---|---|---|---|---|
| SUPPLY | |||||||
| VIN | Input voltage range(1) | 4 | 17 | V | |||
| IQ | Operating quiescent current | EN = High, IOUT = 0 mA, device not switching | 17 | 25 | µA | ||
| ISD | Shutdown current(2) | EN = Low | 1.5 | 4 | µA | ||
| VUVLO | Undervoltage lockout threshold | Falling input voltage | 2.6 | 2.7 | 2.8 | V | |
| Hysteresis | 200 | mV | |||||
| TSD | Thermal shutdown temperature | 160 | °C | ||||
| Thermal shutdown hysteresis | 20 | °C | |||||
| CONTROL (EN, DEF, FSW, SS/TR, PG) | |||||||
| VH | High-level input threshold voltage (EN, DEF, FSW) | 0.9 | V | ||||
| VL | Low-level input threshold voltage (EN, DEF, FSW) | 0.3 | V | ||||
| ILKG | Input leakage current (EN, DEF, FSW) | EN = VIN or GND; DEF, FSW = VOUT or GND | 0.01 | 1 | µA | ||
| VTH_PG | Power-good threshold voltage | Rising (%VOUT) | 92% | 95% | 98% | ||
| Falling (%VOUT) | 87% | 90% | 94% | ||||
| VOL_PG | Power-good output low | IPG = –2 mA | 0.07 | 0.3 | V | ||
| ILKG_PG | Input leakage current (PG) | VPG = 1.8 V | 1 | 400 | nA | ||
| ISS/TR | SS/TR pin source current | 2.3 | 2.5 | 2.7 | µA | ||
| POWER SWITCH | |||||||
| RDS(ON) | High-side MOSFET on-resistance | VIN ≥ 6 V | 90 | 170 | mΩ | ||
| VIN = 3 V | 120 | ||||||
| Low-side MOSFET on-resistance | VIN ≥ 6 V | 40 | 70 | ||||
| VIN = 3 V | 50 | ||||||
| ILIMF | High-side MOSFET forward current limit(3) | VIN = 12 V, TA= 25°C | 1.4 | 1.7 | 2.2 | A | |
| OUTPUT | |||||||
| VREF | Internal reference voltage(4) | 0.8 | V | ||||
| ILKG_FB | Input leakage current (FB) | VFB = 0.8 V | 1 | 100 | nA | ||
| VOUT | Output voltage range | VIN ≥ VOUT | 3.3 | V | |||
| DEF (Output voltage programming) | DEF = 0 (GND) | VOUT | V | ||||
| DEF = 1 (VOUT) | VOUT + 5% | ||||||
| Initial output voltage accuracy(5) | PWM mode operation, VIN ≥ VOUT + 1 V | –1.8% | 1.8% | ||||
| Power-save mode operation, COUT = 22 µF | –2.3% | 2.8% | |||||
| Load regulation(6) | VIN = 12 V, VOUT = 3.3 V, PWM mode operation | 0.05 | %/A | ||||
| Line regulation(6) | 3 V ≤ VIN ≤ 17 V, VOUT = 3.3 V, IOUT = 1 A, PWM mode operation | 0.02 | %/V | ||||
| DESCRIPTION | FIGURE | ||
|---|---|---|---|
| Efficiency | vs Output Current | Figure 1, Figure 3 | |
| vs Input Voltage | Figure 2, Figure 4 | ||
| Output Voltage Accuracy | Load Regulation | Figure 5 | |
| Line Regulation | Figure 6 | ||
| Switching Frequency | vs Input Voltage | Figure 7 | |
| vs Output Current | Figure 8 | ||
| Input Quiescent Current | vs Input voltage | Figure 9 | |
| Input Shutdown Current | vs Input voltage | Figure 10 | |
| High-Side Static Drain-Source-Resistance (RDSon) | vs Input voltage | Figure 11 | |
| Low-Side Static Drain-Source-Resistance (RDSon) | vs Input voltage | Figure 12 | |
| Output Voltage Ripple | vs Output Current | Figure 13 | |
| Output Current | vs Input Voltage | Figure 14 | |
| Power-Supply Rejection Ratio | vs Frequency | Figure 15, Figure 16 | |
| PWM-PSM-Transition | Figure 17 | ||
| Load Transient Response | Figure 18 | ||
| Load Transient Response | Rising Edge | Figure 19 | |
| Falling Edge | Figure 20 | ||
| Startup | Into 100 mA | Figure 21 | |
| Into 1 A | Figure 22 | ||
| Typical Operation in PWM Mode | Figure 23 | ||
| Typical Operation in Power Save Mode | Figure 24 | ||
| FSW = 1.25 MHz | L = 2.2 µH (XFL4020) | COUT = 22 µF |
| CIN = 10 µF |
| FSW = 2.5 MHz | L = 2.2 µH (XFL4020) | COUT = 22 µF |
| CIN = 10 µF |
| L = 2.2 µH (XFL4020) | COUT = 22 µF | CIN = 10 µF |
| L = 2.2 µH (XFL4020) | COUT = 22 µF | CIN = 10 µF |
| L = 2.2 µH (XFL4020) | COUT = 22 µF | CIN = 10 µF |
| FSW = 2.5 MHz | L = 2.2 µH (XFL4020) | COUT = 22 µF |
| CIN = 10 µF |
| VIN = 12 V With 50 mV/div | ||
| VIN = 12 V | ||
| IOUT = 1 A |
| FSW = 2.5 MHz | L = 2.2 µH (XFL4020) | COUT = 22 µF |
| CIN = 10 µF |
| L = 2.2 µH (XFL4020) | COUT = 22 µF | CIN = 10 µF |
| FSW = Low | L = 2.2 µH (XFL4020) | COUT = 22 µF |
| CIN = 10 µF |
| L = 2.2 µH (XFL4020) | COUT = 22 µF | CIN = 10 µF |
| FSW = 2.5 MHz | L = 2.2 µH (XFL4020) | COUT = 22 µF |
| CIN = 10 µF |
| VIN = 12 V | IOUT = 0 to 5 A and back to 0 A | |
| VIN = 12 V | ||
| IOUT = 10 mA |