ZHCSCG9C May 2014 – July 2019 TPS62150A-Q1 , TPS62152A-Q1 , TPS62153A-Q1
PRODUCTION DATA.
- 1 特性
- 2 應(yīng)用
- 3 說明
- 4 修訂歷史記錄
- 5 Device Comparison Table
- 6 Pin Configuration and Functions
- 7 Specifications
- 8 Parameter Measurement Information
-
9 Detailed Description
- 9.1 Overview
- 9.2 Functional Block Diagram
- 9.3
Feature Description
- 9.3.1 Pulse Width Modulation (PWM) Operation
- 9.3.2 Power Save Mode Operation
- 9.3.3 100% Duty-Cycle Operation
- 9.3.4 Enable / Shutdown (EN)
- 9.3.5 Soft Start / Tracking (SS/TR)
- 9.3.6 Current Limit And Short Circuit Protection
- 9.3.7 Power Good (PG)
- 9.3.8 Pin-Selectable Output Voltage (DEF)
- 9.3.9 Frequency Selection (FSW)
- 9.3.10 Under Voltage Lockout (UVLO)
- 9.3.11 Thermal Shutdown
- 9.4 Device Functional Modes
-
10Application and Implementation
- 10.1 Application Information
- 10.2
Typical Application
- 10.2.1
TPS62150A-Q1 Point-Of-Load Step Down Converter
- 10.2.1.1 Design Requirements
- 10.2.1.2
Detailed Design Procedure
- 10.2.1.2.1 Custom Design With WEBENCH® Tools
- 10.2.1.2.2 Programming The Output Voltage
- 10.2.1.2.3 External Component Selection
- 10.2.1.2.4 Inductor Selection
- 10.2.1.2.5 Output Capacitor
- 10.2.1.2.6 Input Capacitor
- 10.2.1.2.7 Soft Start Capacitor
- 10.2.1.2.8 Tracking Function
- 10.2.1.2.9 Output Filter And Loop Stability
- 10.2.1.3 Application Curves
- 10.2.2 System Examples
- 10.2.1
TPS62150A-Q1 Point-Of-Load Step Down Converter
- 11Power Supply Recommendations
- 12Layout
- 13器件和文檔支持
- 14機械、封裝和可訂購信息
封裝選項
請參考 PDF 數(shù)據(jù)表獲取器件具體的封裝圖。
機械數(shù)據(jù) (封裝 | 引腳)
- RGT|16
散熱焊盤機械數(shù)據(jù) (封裝 | 引腳)
訂購信息
9.3.3 100% Duty-Cycle Operation
The duty cycle of the buck converter is given by D=Vout/Vin and increases as the input voltage comes close to the output voltage. In this case, the device starts 100% duty cycle operation turning on the high-side switch 100% of the time. The high-side switch stays turned on as long as the output voltage is below the internal set point. This allows the conversion of small input to output voltage differences, e.g. for longest operation time of battery-powered applications. In 100% duty cycle mode, the low-side FET is switched off.
The minimum input voltage to maintain output voltage regulation, depending on the load current and the output voltage level, can be calculated as:
spacing
where
IOUT is the output current,
RDS(on) is the RDS(on) of the high-side FET and
RL is the DC resistance of the inductor used.
spacing