ZHCSHZ8B april 2018 – february 2023 TPS62147 , TPS62148
PRODUCTION DATA
- 1 特性
- 2 應用
- 3 說明
- 4 Revision History
- 5 Device Comparison Table
- 6 Pin Configuration and Functions
- 7 Specifications
- 8 Parameter Measurement Information
-
9 Detailed Description
- 9.1 Overview
- 9.2 Functional Block Diagram
- 9.3 Feature Description
- 9.4
Device Functional Modes
- 9.4.1 Pulse Width Modulation (PWM) Operation
- 9.4.2 Power Save Mode Operation (PWM/PFM)
- 9.4.3 100% Duty-Cycle Operation
- 9.4.4 Current Limit And Short Circuit Protection (for TPS62148)
- 9.4.5 HICCUP Current Limit And Short Circuit Protection (for TPS62147)
- 9.4.6 Soft Start / Tracking (SS/TR)
- 9.4.7 Output Discharge Function (TPS62148 only)
- 9.4.8 Starting into a Pre-Biased Load
- 10Application and Implementation
- 11Device and Documentation Support
- 12Mechanical, Packaging, and Orderable Information
9.4.3 100% Duty-Cycle Operation
The duty cycle of the buck converter is given by D = VOUT / VIN and increases as the input voltage comes close to the output voltage. The minimum off-time is about 80 ns. When the minimum off-time is reached, TPS62147, TPS62148 scale down the switching frequency while they approach 100% mode. In 100% mode the high-side switch is on continuously. The high-side switch stays turned on as long as the output voltage is below the internal set point. This allows the conversion of small input to output voltage differences, for example for longest operation time of battery-powered applications. In 100% duty-cycle mode, the low-side FET is switched off.
The minimum input voltage to maintain output voltage regulation, depending on the load current and the output voltage level, can be calculated as:
where
- IOUT is the output current,
- RDS(on) is the on-state resistance of the high-side FET and
- RL is the dc resistance of the inductor used.