| EN |
8 |
I |
Enable. A logic high enables the converter, logic low forces the device into shutdown mode, reducing the supply current to less than 2 µA. |
| FB |
5 |
I |
Feedback pin for the fixed output voltage option. For the adjustable version, an external resistive divider is connected to this pin. The internal voltage divider is disabled for the adjustable version. |
| GND |
3 |
I |
Ground |
| LBI |
6 |
I |
Low battery input. |
| LBO |
2 |
O |
Open-drain low battery output. Logic low signal indicates a low battery voltage. |
| PG |
4 |
O |
Power good comparator output. This is an open-drain output. A pullup resistor must be connected between PG and VOUT. The output floats when the output voltage is greater than 95% of the nominal value. |
| PGND |
10 |
I |
Power ground. Connect all power grounds to this pin. |
| SW |
9 |
O |
Connect the inductor to this pin. This pin is the switch pin and connected to the drain of the internal power MOSFETS. |
| SYNC |
7 |
I |
Input for synchronization to the external clock signal. This input can be connected to an external clock or pulled to GND or VI. When an external clock signal is applied, the device synchronizes to this external clock and the device operates in fixed PWM mode. When the pin is pulled to either GND or VI, the internal oscillator is used and the logic level determines if the device operates in fixed PWM or PWM/PFM mode. |
| SYNC = HIGH: Low-noise mode enabled, fixed-frequency PWM operation is forced. |
| SYNC = LOW (GND): Power save mode enabled, PFM/PWM mode enabled. |
| VIN |
1 |
I |
Supply voltage input. |
