12.1 Layout Guidelines

Careful board layout is necessary due to the high transient currents and switching frequency of the converter. All capacitors should be soldered in close proximity to the IC. Connect ground and power ground terminals through a short, low-impedance trace. A PCB layout proposal for a two-layer board is given in Figure 19. The bottom layer of the board carries only ground potential for best performance. The layout also provides improved thermal performance as the exposed lead frame of the PowerPAD package is soldered to the PCB.

An evaluation module for the TPS60140 is available and can be ordered under product code TPS60140EVM−144. The EVM uses the layout shown in Figure 19.

12.2 Layout Example

Figure 19. Recommended Component Placement and Board Layout

The best performance of the converter is achieved with additional bypass capacitors C5 and C6 at the input and output. Capacitor C7 should be included if the large line transients are expected. The capacitors are not required. They can be omitted in most applications.

12.3 Power Dissipation

The power dissipated in the TPS6014x depends mainly on input voltage and output current and is described by Equation 5:

Equation 5.

By observation of Equation 5, it can be seen that the power dissipation is worse for the highest input voltage V_I and the highest output current I_OUT. For an input voltage of 3.6 V and an output current of 100 mA, the calculated power dissipation P_(DISS) is 580 mW. This is also the point where the charge pump operates with its lowest efficiency, which is only 45%, and hence with the highest power losses.

P_(DISS) must be less than that allowed by the package rating. The thermal resistance junction to ambient of the thermally enhanced TSSOP is 178°C/W for an unsoldered package. The thermal resistance junction to case, with the exposed thermal pad soldered to an infinitive heat sink, is 3.5°C/W.

With the recommended maximum junction temperature of 125°C and an assumed maximum ambient operating temperature of 85°C, the maximum allowed thermal resistance junction to ambient of the system can be calculated using Equation 6.

Equation 6.

Using a board layout as described in the application information section, R_θJA is typically 56°C/W for an unsoldered PowerPAD™ and 41°C/W for a soldered PowerPAD.

For more information, refer to the PowerPAD application report, PowerPAD™ Thermally Enhanced Package (SLMA002).