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ZHCSCT5A September 2014 – January 2017 TPS54561-Q1

PRODUCTION DATA.

封裝選項

機械數據 (封裝 | 引腳)

DPR|10
- MPSS046C

散熱焊盤機械數據 (封裝 | 引腳)

DPR|10
- QFND434A

訂購信息

6 Specifications

6.1 Absolute Maximum Ratings⁽¹⁾

Over operating free-air temperature range (unless otherwise noted)

		VALUE		UNIT
		MIN	MAX	UNIT
Input voltage	V_DD	–0.3	65	V
	EN	–0.3	8.4
	FB	–0.3	3
	COMP	–0.3	3
	PWRGD	–0.3	6
	SS/TR	–0.3	3
	RT/CLK	–0.3	3.6
Output voltage	BOOT-SW	–0.3	8	V
	SW	–0.6	65
	SW, 5-ns transient	–7	65
	SW, 10-ns transient	–2	65
Operating junction temperature		-40	150	°C
Storage temperature range, T_stg		–65	150	°C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and do not imply functional operation of the device at these or any other conditions beyond those indicated under Rec–65ommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

6.2 ESD Ratings

				VALUE	UNIT
V_(ESD)	Electrostatic discharge	Human-body model (HBM), per AEC Q100-002⁽¹⁾		±2000	V
V_(ESD)	Electrostatic discharge	Charged-device model (CDM), per AEC-Q100-011		±750	V

(1) AEC Q100-002 indicates HBM stressing is done in accordance with the ANSI/ESDA/JEDEC JS-001 specification.

6.3 Recommended Operating Conditions

Over operating free-air temperature range (unless otherwise noted)

		MIN	MAX	UNIT
V_DD	Supply input voltage	4.5	60	V
V_O	Output voltage	0.8	58.8	V
I_O	Output current	0	5	A
T_J	Junction temperature	–40	150	°C

6.4 Thermal Information

THERMAL METRIC⁽¹⁾⁽²⁾		TPS54561-Q1	UNIT
		DPR
		10 PINS
R_θJA	Junction-to-ambient thermal resistance (standard board)	35.1	°C/W
R_θJCtop	Junction-to-case (top) thermal resistance	34.1	°C/W
R_θJB	Junction-to-board thermal resistance	12.3	°C/W
ψ_JT	Junction-to-top characterization parameter	0.3	°C/W
ψ_JB	Junction-to-board characterization parameter	12.5	°C/W
R_θJCbot	Junction-to-case (bottom) thermal resistance	2.2	°C/W

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

(2) Determination of the power rating at a specific ambient temperature must be at the maximum junction temperature of 150°C. This is the point where distortion starts to increase substantially. See the power dissipation estimate in the Power Dissipation Estimate section of this data sheet for more information.

6.5 Electrical Characteristics

T_J = –40°C to 150°C, V_DD = 4.5 to 60 V (unless otherwise noted)

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
SUPPLY VOLTAGE (V_DD PIN)
	Operating input voltage		4.5		60	V
	Internal undervoltage lockout threshold	V_DD rising	4.1	4.3	4.48	V
	Internal undervoltage lockout threshold hysteresis			325		mV
	Shutdown supply current	V_(EN) = 0 V, T_A = 25°C, 4.5 V ≤ V_DD ≤ 60 V		2.25	4.5	µA
	Operating: nonswitching supply current	V_(FB) = 0.9 V, T_A = 25°C		152	200	µA
ENABLE AND UVLO (EN PIN)
V_(EN)th	Enable threshold voltage	No voltage hysteresis, rising and falling	1.1	1.2	1.3	V
	Input current	Enable threshold + 50 mV		–4.6		µA
	Input current	Enable threshold – 50 mV	–0.58	–1.2	-1.8	µA
I_(HYS)	Hysteresis current		–2.2	–3.4	-4.5	µA
VOLTAGE REFERENCE
V_ref	Voltage reference		0.792	0.8	0.808	V
HIGH-SIDE MOSFET
	On-resistance	V_DD = 12 V, V_(BOOT-SW) = 6 V		87	185	mΩ
ERROR AMPLIFIER
	Input current			50		nA
g_m(ea)	Error-amplifier transconductance	–2 µA < I_(COMP) < 2 µA, V_(COMP) = 1 V		350		µS
	Error-amplifier transconductance (g_m) during soft-start	–2 µA < I_(COMP) < 2 µA, V_(COMP) = 1 V, V_(FB) = 0.4 V		78		µS
A_(OL)	Error-amplifier open-loop dc gain	V_(FB) = 0.8 V		10 000		V/V
	Minnimum unity-gain bandwidth			2500		kHz
	Error-amplifier source and sink	V_(COMP) = 1 V, 100 mV overdrive		±30		µA
g_m(ps)	COMP to SW current transconductance			17		S
CURRENT LIMIT
	Current limit threshold	All V_DD and temperatures, open loop⁽¹⁾	6.3	7.5	8.8	A
		All temperatures, V_DD = 12 V, open loop⁽¹⁾	6.3	7.5	8.3
		V_DD = 12 V, T_A = 25°C, open loop⁽¹⁾	7.1	7.5	7.9
THERMAL SHUTDOWN
	Thermal shutdown			176		°C
	Thermal shutdown hysteresis			12		°C
EXTERNAL CLOCK (RT/CLK PIN)
	RT/CLK high threshold			1.55	2	V
	RT/CLK low threshold		0.5	1.2		V
SOFT-START AND TRACKING (SS/TR PIN)
I_(SS)	Charge current	V_(SS/TR) = 0.4 V		1.7		µA
	SS/TR-to-FB matching	V_(SS/TR) = 0.4 V		42		mV
	SS/TR-to-reference crossover	98% of nominal FB voltage		1.16		V
	SS/TR discharge current (overload)	V_(FB) = 0 V, V_(SS/TR) = 0.4 V		354		µA
	SS/TR discharge voltage	V_(FB) = 0 V		54		mV
POWER GOOD (PWRGD PIN)
	FB threshold for PWRGD low	FB falling		91%
	FB threshold for PWRGD high	FB rising		93%
	FB threshold for PWRGD low	FB rising		108%
	FB threshold for PWRGD high	FB falling		106%
	Hysteresis	FB falling		2%
	Output-high leakage	V_(PWRGD) = 5.5 V, T_A = 25°C		10		nA
	On-resistance	I_(PWRGD) = 3 mA, V_(FB) < 0.79 V		45		Ω
	Minimum input voltage for defined output voltage	V_(PWRGD) < 0.5 V, I_(PWRGD) = 100 µA		0.9	2	V

(1) Measure open-loop current limit directly at the SW pin. The current is independent of the inductor value and slope compensation.

6.6 Timing Requirements

			MIN	TYP	MAX	UNIT
RT/CLK
	Minimum CLK input pulse duration			15		ns

6.7 Switching Characteristics

T_J = –40°C to 150°C, V_DD = 4.5 V to 60 V (unless otherwise noted)

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
ENABLE AND UVLO (EN PIN)
	Enable to COMP active	V_DD = 12 V, T_A = 25°C		540		µs
CURRENT-LIMIT
t_d(CL)	Current limit threshold delay			60		ns
SW
t_(ON)	Minimum controllable on-time	V_DD = 23.7 V, V_O = 5 V, I_O= 3.5 A, R_(RT) = 39.6 kΩ, T_A = 25°C		100		ns
RT/CLK
	Switching frequency range using RT mode		100		2500	kHz
f_(SW)	Switching frequency	R_(RT) = 200 kΩ	450	500	550	kHz
	Switching frequency range using CLK mode		160		2300	kHz
TIMING RESISTOR AND EXTERNAL CLOCK (RT/CLK PIN)
	RT/CLK falling edge to SW rising edge delay	Measured at 500 kHz with an RT resistor (R_(RT)) in series		55		ns
	PLL lock-in time	Measured at 500 kHz		78		µs