极品美女一区二区三区 ,色噜噜av亚洲色一区二区,x8x8拨牐拨牐x8免费视频8午夜天天摸天天碰天天添中文无码

ZHCSI26C August 2010 – April 2018 TPS54320

PRODUCTION DATA.

封裝選項

機械數據 (封裝 | 引腳)

RHL|14
- MPQF252H

散熱焊盤機械數據 (封裝 | 引腳)

訂購信息

6.5 Electrical Characteristics

T_J= –40°C to 150°C, VIN = 4.5 to 17 V, PVIN = 1.6 to 17 V (unless otherwise noted)

PARAMETER	TEST CONDITIONS	MIN	TYP	MAX	UNIT
SUPPLY VOLTAGE (VIN AND PVIN PINS)
PVIN operating input voltage		1.6		17	V
VIN operating input voltage		4.5		17	V
VIN internal UVLO threshold	VIN rising		4.0	4.5	V
VIN internal UVLO hysteresis			150		mV
VIN shutdown supply Current	EN = 0 V		2	5	μA
VIN operating – non switching supply current	VSENSE = 810 mV		600	800	μA
ENABLE AND UVLO (EN PIN)
Enable threshold	Rising		1.21	1.26	V
Enable threshold	Falling	1.10	1.17		V
EN pin sourcing current EN low	EN = 1.1 V		1.15		μA
EN pin sourcing current EN high	EN = 1.3 V		3.4		μA
VOLTAGE REFERENCE
Voltage reference	0 A ≤ I_OUT ≤ 3 A	0.792	0.800	0.808	V
MOSFET
High-side switch resistance⁽¹⁾	BOOT-PH = 3 V		77	116	mΩ
High-side switch resistance⁽¹⁾	BOOT-PH = 6 V		57	103	mΩ
Low-side Switch Resistance⁽¹⁾	VIN = 12 V		50	87	mΩ
ERROR AMPLIFIER
Error amplifier Transconductance (gm)	–2 μA < I_(COMP)< 2 μA, V_(COMP) = 1 V		1300		μMhos
Error amplifier dc gain	VSENSE = 0.8 V	1000	3100		V/V
Error amplifier source/sink	V_(COMP) = 1 V, 100-mV input overdrive		±110		μA
Start switching threshold			0.25		V
COMP to Iswitch gm			12		A/V
CURRENT LIMIT
High-side switch current limit threshold		4.2	6.2		A
Low-side switch sourcing current limit		3.8	5.8		A
Low-side switch sinking current limit		1	2.6		A
Hiccup wait time before triggering hiccup			512		cycles
Hiccup time before restart			16384		cycles
THERMAL SHUTDOWN
Thermal shutdown		160	175		°C
Thermal shutdown hysteresis			10		°C
TIMING RESISTOR AND EXTERNAL CLOCK (RT/CLK PIN)
Minimum switching frequency	Rrt = 240 kΩ (1%)	160	200	240	kHz
Switching frequency	Rrt = 100 kΩ (1%)	400	480	560	kHz
Maximum switching frequency	Rrt = 40.2 kΩ (1%)	1080	1200	1320	kHz
Minimum pulse width			20		ns
RT/CLK high threshold				2	V
RT/CLK low threshold		0.8			V
RT/CLK falling edge to PH rising edge delay	Measure at 500 kHz with RT resistor in series		62		ns
Switching frequency range (RT mode set point and PLL mode)		200		1200	kHz
PH (PH PIN)
Minimum on time	Measured at 90% to 90% of PH, T_A = 25°C, I_PH = 2 A		97	135	ns
Minimum off time	BOOT-PH ≥ 3 V		0		ns
BOOT (BOOT PIN)
BOOT-PH UVLO			2.1	3	V
SLOW START AND TRACKING (SS/TR PIN)
SS charge current			2.3		μA
SS/TR to VSENSE matching	V_(SS/TR) = 0.4 V		29	60	mV
POWER GOOD (PWRGD PIN)
VSENSE threshold	VSENSE falling (Fault)		91		% Vref
	VSENSE rising (Good)		94		% Vref
	VSENSE rising (Fault)		109		% Vref
	VSENSE falling (Good)		106		% Vref
Output high leakage	VSENSE = Vref, V_(PWRGD) = 5.5 V		30	100	nA
Output low	I_(PWRGD) = 2 mA			0.3	V
Minimum VIN for valid output	V_(PWRGD)< 0.5V at 100 μA		0.6	1	V
Minimum SS/TR voltage for PWRGD valid			1.2	1.4	V

(1) Measured at pins