ZHCSFI2B July 2016 – February 2017 TPS53667
PRODUCTION DATA.
- 1 特性
- 2 應(yīng)用范圍
- 3 說明
- 4 修訂歷史記錄
- 5 Pin Configuration and Functions
- 6 Specifications
-
7 Detailed Description
- 7.1 Overview
- 7.2 Functional Block Diagram
- 7.3
Feature Description
- 7.3.1 V3R3 LDO
- 7.3.2 PWM Operation
- 7.3.3 Current Sense and IMON Calculation
- 7.3.4 Setting the Load-Line (DROOP)
- 7.3.5 Load Transitions
- 7.3.6 Overshoot Reduction (OSR)
- 7.3.7 Undershoot Reduction (USR)
- 7.3.8 AutoBalance™ Current Sharing
- 7.3.9 Phase Overlap
- 7.3.10 VID
- 7.3.11 PWM and SKIP Signals
- 7.3.12 TSEN (Thermal Sense) Pin
- 7.3.13 RESET Function
- 7.3.14 Input UVLO
- 7.3.15 V5 Pin Undervoltage Lockout (UVLO)
- 7.3.16 Output Undervoltage Protection (UVP)
- 7.3.17 Overvoltage Protection (OVP)
- 7.3.18 Overcurrent Limit (OCL) and Overcurrent Protection (OCP)
- 7.3.19 Current Sharing Warning and Phase Fault Detect
- 7.3.20 Turn off Individual Phase by PMBus
- 7.3.21 Phase Shedding
- 7.3.22 Over Temperature Protection (OTP)
- 7.3.23 VR_HOT and VR_FAULT Indication
- 7.4 Device Functional Modes
- 7.5
Programming
- 7.5.1
User Selections
- 7.5.1.1 Switching Frequency
- 7.5.1.2 IMAX Information
- 7.5.1.3 Boot Voltage
- 7.5.1.4 Per-Phase Overcurrent Limit (OCL) Level
- 7.5.1.5 Overshoot Reduction (OSR) and Undershoot Reduction (USR) Levels
- 7.5.1.6 Slew Rate Selection
- 7.5.1.7 Mode Selections
- 7.5.1.8 Soft Start Slew Rate and PMBus Addresses
- 7.5.1.9 Ramp Selection
- 7.5.1.10 Maximum Active Phase Numbers
- 7.5.1.11 Pinstrap Mode Settings
- 7.5.1.12 NVM Default Settings
- 7.5.1.13 6-Phase Application
- 7.5.1.14 6-Phase NVM Application
- 7.5.2 Supported Protections and Fault Reports
- 7.5.3 Supported PMBus Address and Commands Summary
- 7.5.1
User Selections
- 7.6
Register Maps
- 7.6.1 PMBus Description
- 7.6.2
PMBus Functionality
- 7.6.2.1 PMBus Address
- 7.6.2.2 Pin Strap Settings
- 7.6.2.3
Supported PMBus Commands
- 7.6.2.3.1 OPERATION (01h)
- 7.6.2.3.2 ON_OFF_CONFIG (02h)
- 7.6.2.3.3 CLEAR_FAULTS (03h)
- 7.6.2.3.4 WRITE_PROTECT (10h)
- 7.6.2.3.5 STORE_DEFAULT_ALL (11h)
- 7.6.2.3.6 RESTORE_DEFAULT_ALL (12h)
- 7.6.2.3.7 CAPABILITY (19h)
- 7.6.2.3.8 VOUT_MODE (20h)
- 7.6.2.3.9 VOUT_COMMAND (21h)
- 7.6.2.3.10 VOUT_MAX (24h)
- 7.6.2.3.11 VOUT_MARGIN_HIGH (25h)
- 7.6.2.3.12 VOUT_MARGIN_LOW (26h)
- 7.6.2.3.13 IOUT_CAL_OFFSET (39h)
- 7.6.2.3.14 VOUT_OV_FAULT_RESPONSE (41h)
- 7.6.2.3.15 VOUT_UV_FAULT_RESPONSE (45h)
- 7.6.2.3.16 IOUT_OC_FAULT_LIMIT (46h)
- 7.6.2.3.17 IOUT_OC_FAULT_RESPONSE (47h)
- 7.6.2.3.18 IOUT_OC_WARN_LIMIT (4Ah)
- 7.6.2.3.19 OT_FAULT_LIMIT (4Fh)
- 7.6.2.3.20 OT_FAULT_RESPONSE (50h)
- 7.6.2.3.21 OT_WARN_LIMIT (51h)
- 7.6.2.3.22 VIN_OV_FAULT_LIMIT (55h)
- 7.6.2.3.23 IIN_OC_FAULT_LIMIT (5Bh)
- 7.6.2.3.24 IIN_OC_FAULT_RESPONSE (5Ch)
- 7.6.2.3.25 IIN_OC_WARN_LIMIT (5Dh)
- 7.6.2.3.26 STATUS_BYTE (78h)
- 7.6.2.3.27 STATUS_WORD (79h)
- 7.6.2.3.28 STATUS_VOUT (7Ah)
- 7.6.2.3.29 STATUS_IOUT (7Bh)
- 7.6.2.3.30 STATUS_INPUT (7Ch)
- 7.6.2.3.31 STATUS_TEMPERATURE (7Dh)
- 7.6.2.3.32 STATUS_CML (7Eh)
- 7.6.2.3.33 STATUS_MFR_SPECIFIC (80h)
- 7.6.2.3.34 READ_VIN (88h)
- 7.6.2.3.35 READ_IIN (89h)
- 7.6.2.3.36 READ_VOUT (8Bh)
- 7.6.2.3.37 READ_IOUT (8Ch)
- 7.6.2.3.38 READ_TEMPERATURE_1 (8Dh)
- 7.6.2.3.39 READ_POUT (96h)
- 7.6.2.3.40 READ_PIN (97h)
- 7.6.2.3.41 PMBus_REVISION (98h)
- 7.6.2.3.42 MFR_ID (99h)
- 7.6.2.3.43 MFR_MODEL (9Ah)
- 7.6.2.3.44 MFR_REVISION (9Bh)
- 7.6.2.3.45 MFR_DATE (9Dh)
- 7.6.2.3.46 MFR_VOUT_MIN (A4h)
- 7.6.2.3.47 MFR_SPECIFIC_00 (Per-Phase Overcurrent Limit) (D0h)
- 7.6.2.3.48 MFR_SPECIFIC_01 (Telemetry Averaging Time) (D1h)
- 7.6.2.3.49 MFR_SPECIFIC_04 (Read VOUT) (D4h)
- 7.6.2.3.50 MFR_SPECIFIC_05 (VOUT Trim) (D5h)
- 7.6.2.3.51 MFR_SPECIFIC_07 (Additional Function Bits) (D7h)
- 7.6.2.3.52 MFR_SPECIFIC_08 (Droop) (D8h)
- 7.6.2.3.53 MFR_SPECIFIC_09 (OSR/USR) (D9h)
- 7.6.2.3.54 MFR_SPECIFIC_10 (Maximum Operating Current) (DAh)
- 7.6.2.3.55 MFR_SPECIFIC_11 (VBOOT) (DBh)
- 7.6.2.3.56 MFR_SPECIFIC_12 (Switching Frequency and TRISE) (DCh)
- 7.6.2.3.57 MFR_SPECIFIC_13 (Slew Rate and Other Operation Modes) (DDh)
- 7.6.2.3.58 MFR_SPECIFIC_14 (Ramp Height) (DEh)
- 7.6.2.3.59 MFR_SPECIFIC_15 (Dynamic Phase Shedding Thresholds) (DFh)
- 7.6.2.3.60 MFR_SPECIFIC_16 (VIN UVLO) (E0h)
- 7.6.2.3.61 MFR_SPECIFIC_19 (E3h)
- 7.6.2.3.62 MFR_SPECIFIC_20 (Maximum Operational Phase Number) (E4h)
- 7.6.2.3.63 MFR_SPECIFIC_21 (VIN UVLO) (E5h)
- 7.6.2.3.64 MFR_SPECIFIC_22 ( VOUT_UV_FAULT_threshold) (E6h)
- 7.6.2.3.65 MFR_SPECIFIC_23 (E7h)
- 7.6.2.3.66 MFR_SPECIFIC_24 (E8h)
- 7.6.2.3.67 MFR_SPECIFIC_44 (DEVICE_CODE) (FCh)
-
8 Application and Implementation
- 8.1 Application Information
- 8.2
Typical Application
- 8.2.1 Design Requirements
- 8.2.2
Detailed Design Procedure
- 8.2.2.1 Select the Switching Frequency
- 8.2.2.2 Set the Maximum Output Current (IMAX)
- 8.2.2.3 Select the Soft-Start Slew Rate
- 8.2.2.4 Select the Operation Mode
- 8.2.2.5 Choose Inductor
- 8.2.2.6 Select the Per-Phase Valley Current Limit And Ramp Level
- 8.2.2.7 Set the Load-Line
- 8.2.2.8 Set the BOOT Voltage
- 8.2.2.9 Set OSR/USR Thresholds to Improve Load Transient Performance
- 8.2.2.10 Digital Current Monitor (IMON) Gain and Filter Setting
- 8.2.2.11 Compensation Design
- 8.2.2.12 Set PMBus Addresses
- 8.2.2.13 Programming the Device with the PMBus
- 8.2.3 Application Curves
- 9 Power Supply Recommendations
-
10Layout
- 10.1
Layout Guidelines
- 10.1.1 Schematic Review Checklist
- 10.1.2
PCB Design Guidelines
- 10.1.2.1 Layer Stack-up, 8-Layer PCB as example
- 10.1.2.2 Current Sensing Lines
- 10.1.2.3 Feedback Voltage Sensing Lines
- 10.1.2.4 PWM Lines
- 10.1.2.5 Power Chain Symmetry
- 10.1.2.6 Placing Analog Signal Components
- 10.1.2.7 Grounding Recommendations
- 10.1.2.8 TI Smart Power Stage CSD95490Q5MC
- 10.1.2.9 Power Delivery and Power Density
- 10.2 Layout Example
- 10.1
Layout Guidelines
- 11器件和文檔支持
- 12機(jī)械、封裝和可訂購信息
封裝選項(xiàng)
機(jī)械數(shù)據(jù) (封裝 | 引腳)
- RTA|40
散熱焊盤機(jī)械數(shù)據(jù) (封裝 | 引腳)
- RTA|40
訂購信息
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1) (2)| MIN | MAX | UNIT | ||
|---|---|---|---|---|
| Input Voltage | VIN | –0.3 | 19 | V |
| V5 | –0.3 | 6 | ||
| ADDR-TRISE, CSP1, CSP2, CSP3, CSP4, CSP5, CSP6, ENABLE, F-IMAX, OCL-R, O-USR, PMB_CLK, PMB_DIO, RESET, SLEW-MODE, VBOOT, VSP | –0.3 | 3.6 | ||
| TSEN | –0.3 | 6 | ||
| GND, VSN | –0.3 | 0.3 | ||
| Output Voltage | VREF | –0.3 | 1.8 | V |
| IMON, ISUM,PMB_ALERT, PWM1, PWM2, PWM3, PWM4, PWM5, PWM6, SKIP-NVM, V3R3, VR_RDY, VR_FAULT, VR_HOT | –0.3 | 3.6 | ||
| COMP | –0.3 | 6 | ||
| Operating Junction Temperature, TJ | –40 | 150 | °C | |
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to the network ground terminal GND unless otherwise noted.
6.2 Handling Ratings
| MIN | MAX | UNIT | |||
|---|---|---|---|---|---|
| Tstg | Storage temperature range | –55 | 150 | °C | |
| V(ESD) | Electrostatic discharge | Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1) | -2.5 | 2.5 | kV |
| Charged device model (CDM), per JEDEC specification JESD22-C101, all pins(2) | -1.5 | 1.5 | |||
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)| MIN | NOM | MAX | UNIT | |||
|---|---|---|---|---|---|---|
| VI | Input voltage | VIN | 4.5 | 12 | 17 | V |
| TSEN | -0.1 | 5.5 | ||||
| V5 | 4.5 | 5 | 5.5 | |||
| ADDR-TRISE, F-IMAX, OCL-R, O-USR, SLEW-MODE, VBOOT | 0.1 | VVREF | ||||
| CSP1, CSP2, CSP3, CSP4, CSP5, CSP6, VSP | –0.1 | 2.5 | ||||
| ENABLE, PMB_CLK, PMB_DIO | –0.1 | 3.5 | ||||
| GND, VSN | –0.1 | 0.1 | ||||
| VO | Output voltage | VREF | –0.1 | 1.72 | V | |
| V3R3 | -0.1 | 3.3 | 3.5 | |||
| IMON, ISUM, PMB_ALERT, PWM1, PWM2, PWM3, PWM4, PWM5, PWM6, SKIP-NVM, VR_RDY, VR_FAULT, VR_HOT | –0.1 | 3.5 | ||||
| COMP | –0.1 | 5.5 | ||||
| TA | Operating free air temperature | –40 | 125 | °C | ||
6.4 Thermal Information
| THERMAL METRIC(1) | TPS53667 | UNIT | |
|---|---|---|---|
| RTA (QFN) | |||
| 40 PINS | |||
| RθJA | Junction-to-ambient thermal resistance | 30.6 | °C/W |
| RθJC(top) | Junction-to-case (top) thermal resistance | 14.2 | |
| RθJB | Junction-to-board thermal resistance | 6.9 | |
| ψJT | Junction-to-top characterization parameter | 0.2 | |
| ψJB | Junction-to-board characterization parameter | 6.8 | |
| RθJC(bot) | Junction-to-case (bottom) thermal resistance | 1.8 | |
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
6.5 Electrical Characteristics
over recommended free-air temperature range, VVIN = 12 V, VV5 = 5 V, VVSN = GND, VVSP = VOUT (unless otherwise noted).| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| SUPPLY: CURRENTS, UVLO, AND POWER-ON RESET | ||||||
| IVIN | VIN supply current, 6-phase active | VVDAC < VVSP < VVDAC + 100 mV, ENABLE = HI | 115 | µA | ||
| IV5 | V5 supply current | PMBus Idle, ENABLE = HI | 6.1 | 7 | mA | |
| IV5SBY | V5 standby current | ENABLE = LO | 2 | 2.6 | mA | |
| VV3R3 | V3R3 output voltage | IV3R3 = 0 A | 3.2 | 3.3 | 3.4 | V |
| VV3R3(dropout) | V3R3 load regulation | IV3R3 = 5 mA | 100 | mV | ||
| VV5UVLOH | V5 UVLO OK threshold | Ramp up | 4.1 | 4.25 | 4.5 | V |
| VV5UVLOL | V5 UVLO fault threshold | Ramp down | 3.95 | 4.05 | 4.25 | V |
| VHYS(V5) | V5 UVLO hysteresis | Hysteresis | 0.15 | 0.23 | 0.3 | V |
| VVINUVLO | VIN UVLO voltage | MFR_SPEC_16[1:0] = 00 | 4.2 | 4.5 | 4.7 | V |
| MFR_SPEC_16[1:0] = 01 | 6.9 | 7.25 | 7.45 | |||
| MFR_SPEC_16[1:0] = 10 | 7.6 | 7.9 | 8.2 | |||
| MFR_SPEC_16[1:0] = 11 | 9.8 | 10.3 | 10.7 | |||
| VHYS(VIN) | VIN UVLO hysteresis voltage | Hysteresis voltage | 1.05 | V | ||
| REFERENCES: DAC AND VREF | ||||||
| VVIDSTP | VID Step size | VR12.5: Change VID0 HI to LO to HI | 10 | mV | ||
| VR12.0: Change VID0 HI to LO to HI | 5 | mV | ||||
| VDAC1 | Closed Loop VSP tolerance | VR12.0: 0.61 V ≤ VVSP ≤ 0.995 V, IOUT = 0 A , 0 °C ≤ TA≤ 85 °C | –6 | 6.5 | mV | |
| VDAC2 | Closed Loop VSP tolerance | VR12.0: 1 V ≤ VVSP ≤ 1.52 V, ICOUT = 0 A, 0 °C ≤ TA≤ 85 °C | –0.6 | 0.6 | % | |
| VDAC3 | Closed Loop VSP tolerance | VR12.5: 1.50V ≤ VVSP ≤ 2.50 V, IOUT = 0 A, 0 °C ≤ TA≤ 85 °C | –1 | 1 | % | |
| VDAC4 | Closed Loop VSP tolerance | VR12.0: 0.61 V ≤ VVSP ≤ 0.995 V, IOUT = 0 A, –40°C ≤ TA≤ 125 °C | –8 | 8 | mV | |
| VDAC5 | Closed Loop VSP tolerance | VR12.0: 1.0 V ≤ VVSP ≤ 1.52 V, IOUT = 0 A, –40 °C ≤ TA≤ 125 °C | -0.8 | 0.8 | % | |
| VDAC6 | Closed Loop VSP tolerance | VR12.5: 1.50 V ≤ VVSP ≤ 2.50V, IOUT = 0 A, –40°C ≤ TA≤ 125 °C | -1.1 | 1.0 | % | |
| VVREF | VREF output | 4.5 ≤ VV5 ≤ 5.5 V, IVREF = 0 A | 1.685 | 1.70 | 1.717 | V |
| VVREFSRC | VREF output source | IVREF = 0 to 500 µA | –4 | -1 | mV | |
| VVREFSNK | VREF output sink | IVREF = –500 to 0 µA | 1 | 4 | mV | |
| CURRENT SENSE: AMPLIFIER AND PHASE BALANCING | ||||||
| GCSINT | Internal current sense gain | Gain from (CSPx – VREF ) to PWM comparator | 1.0 | V/V | ||
| COMPENSATOR: VOLTAGE POSITIONING AND AMPLIFIER | ||||||
| gM(isum) | ISUM amplifier transconductance | VVSP = 1.7 V | 500 | µS | ||
| gM(comp) | COMP amplifier transconductance | VVSP = 1.7 V | 1000 | µS | ||
| VCCLAMPN | COMP amplifier negative clamp voltage | (VVREF – VCOMP) | VRAMP + 20 | mV | ||
| VCCLAMPP | COMP amplifier positive clamp voltage | (VCOMP – VVREF) | 2.1 | 2.2 | 2.3 | V |
| VOLTAGE SENSE: VSP AND VSN | ||||||
| IVSP | VSP input bias current | Not in fault, disable or UVLO, VVSP = VVDAC = 2.3 V, VVSN = 0 V |
300 | µA | ||
| IVSN | VSN input bias current | Not in fault, disable or UVLO, VVSP = VVDAC = 2.3 V, VVSN = 0 V |
-30 | -23 | µA | |
| RSFTSTP | Transistor resistance | Connect to VSP | 10 | kΩ | ||
| LOGIC ( RESET, VR_RDY, VR_FAULT, VR_HOT, AND ENABLE) INTERFACE PINS: I/O VOLTAGE AND CURRENT | ||||||
| RRPGDL | Open drain pull-down resistance | VR_RDY, pulldown resistance at 0.31 V | 36 | 50 | Ω | |
| IVRTTLK | Open drain leakage current | VR_HOT, VR_RDY, hi-Z leakage, apply 3.3 V in off state | –2 | 0.2 | 2 | µA |
| VRSTL | RESET logic low | RESET Pin | 0.8 | V | ||
| VRSTH | RESET logic high | RESET Pin | 1.2 | V | ||
| TRSTTDLY | RESET Delay Time | 1 | µs | |||
| VENL | ENABLE logic low | 0.3 | V | |||
| VENH | ENABLE logic high | 0.8 | V | |||
| IENH | I/O 1.1- V leakage | Leakage current , VENABLE = 1.1 V | 25 | µA | ||
| PMBUS INTERFACE PINS: I/O VOLTAGE AND CURRENT | ||||||
| VPMBL | PMBus pins logic low | 0.8 | V | |||
| VPMBH | PMBus pins logic high | 1.2 | V | |||
| IPMBL | Logic low input current | VPMBus=0 V | -10 | 10 | µA | |
| IPMBH | Logic high input current | VPMBus=1.8 V | -10 | 10 | µA | |
| ADDR-TRISE PIN: PMBUS ADDRESS, SOFT START RISE TIME SETTING | ||||||
| SLRISE | Soft start rise slew rate in terms of VOUT slew rate | RADDR-TRISE ≤ 20 kΩ or RADDR-TRISE = 24 kΩ or MFR_SPEC_12<1:0> = 00b | 1 | |||
| RADDR-TRISE = 30 kΩ or RADDR-TRISE = 39 kΩ or MFR_SPEC_12<1:0> = 01b | 1/2 | |||||
| RADDR-TRISE = 56 kΩ or RADDR-TRISE = 75 kΩ or MFR_SPEC_12<1:0> = 10b | 1/4 | |||||
| RADDR-TRISE = 100 kΩ or RADDR-TRISE = 150 kΩ or MFR_SPEC_12<1:0> = 11b | 1/8 | |||||
| BOOT | BOOT voltage set (B0) | RADDR-TRISE ≤ 20 kΩ or RADDR-TRISE = 30 kΩ or RADDR-TRISE = 56 kΩ or RADDR-TRISE = 100 kΩ, or MFR_SPEC_11 [0] = 0b | 0 | |||
| RADDR-TRISE = 24 kΩ or RADDR-TRISE = 39 kΩ or RADDR-TRISE = 75 kΩ or RADDR-TRISE = 150 kΩ, or MFR_SPEC_11 [0] = 1b | 1 | |||||
| PADDR | PMBus address bits set (11P40P2P1P0) | VADDR-TRISE ≤ 0.053 V with ±20 mV tolerance | 1100000 | |||
| VADDR-TRISE = 0.159 V with ±20 mV tolerance | 1100001 | |||||
| VADDR-TRISE = 0.266 V with ±20 mV tolerance | 1100010 | |||||
| VADDR-TRISE = 0.372 V with ±20 mV tolerance | 1100011 | |||||
| VADDR-TRISE = 0.478 V with ±20 mV tolerance | 1100100 | |||||
| VADDR-TRISE = 0.584 V with ±20 mV tolerance | 1100101 | |||||
| VADDR-TRISE = 0.691 V with ±20 mV tolerance | 1100110 | |||||
| VADDR-TRISE = 0.797 V with ±20 mV tolerance | 1100111 | |||||
| VADDR-TRISE = 0.903 V with ±20 mV tolerance | 1110000 | |||||
| VADDR-TRISE = 1.009 V with ±20 mV tolerance | 1110001 | |||||
| VADDR-TRISE = 1.116 V with ±20 mV tolerance | 1110010 | |||||
| VADDR-TRISE = 1.222 V with ±20 mV tolerance | 1110011 | |||||
| VADDR-TRISE = 1.328 V with ±20 mV tolerance | 1110100 | |||||
| VADDR-TRISE = 1.434 V with ±20 mV tolerance | 1110101 | |||||
| VADDR-TRISE = 1.541 V with ±20 mV tolerance | 1110110 | |||||
| VADDR-TRISE = 1.615 V with ±10 mV tolerance | 1110111 | |||||
| OCL-R PIN: OVERCURRENT THRESHOLDS AND RAMP SETTINGS | ||||||
| IOCLx | Phase OCL level (CSPx-VREF) (valley current-limit) |
ROCL-R = 20 kΩ and VOCL-R ≤ 0.85 V or MFR_SPEC_00[3:0] = 0000b |
21 | 24 | 27 | A |
| ROCL-R = 24 kΩ and VOCL-R ≤ 0.85 V or MFR_SPEC_00[3:0] = 0001b |
25 | 27 | 30 | |||
| ROCL-R = 30 kΩ and VOCL-R ≤ 0.85 V or MFR_SPEC_00[3:0] = 0010b |
28 | 30 | 33 | |||
| ROCL-R = 39 kΩ and VOCL-R ≤ 0.85 V or MFR_SPEC_00[3:0] = 0011b |
31 | 33 | 36 | |||
| ROCL-R = 56 kΩ and VOCL-R ≤ 0.85 V or MFR_SPEC_00[3:0] = 0100b |
34 | 36 | 39 | |||
| ROCL-R = 75 kΩ and VOCL-R ≤ 0.85 V or MFR_SPEC_00[3:0] = 0101b |
37 | 39 | 42 | |||
| ROCL-R = 100 kΩ and VOCL-R ≤ 0.85 V or MFR_SPEC_00[3:0] = 0110b |
40 | 42 | 45 | |||
| ROCL-R ≥ 150 kΩ and VOCL-R ≤ 0.85 V or MFR_SPEC_00[3:0] = 0111b |
43 | 45 | 48 | |||
| ROCL-R = 20 kΩ and VOCL-R ≥ 0.95 V or MFR_SPEC_00[3:0] = 1000b |
46 | 48 | 51 | |||
| ROCL-R = 24 kΩ and VOCL-R ≥ 0.95 V or MFR_SPEC_00[3:0] = 1001b |
49 | 51 | 54 | |||
| ROCL-R = 30 kΩ and VOCL-R ≥ 0.95 V or MFR_SPEC_00[3:0] = 1010b |
52 | 54 | 57 | |||
| ROCL-R = 39 kΩ and VOCL-R ≥ 0.95 V or MFR_SPEC_00[3:0] = 1011b |
55 | 57 | 60 | |||
| ROCL-R = 56 kΩ and VOCL-R ≥ 0.95 V or MFR_SPEC_00[3:0] = 1100b |
58 | 60 | 63 | |||
| ROCL-R = 75 kΩ and VOCL-R ≥ 0.95 V or MFR_SPEC_00[3:0] = 1101b |
61 | 63 | 66 | |||
| ROCL-R = 100 kΩ and VOCL-R ≥ 0.95 V or MFR_SPEC_00[3:0] = 1110b |
64 | 66 | 69 | |||
| ROCL-R ≥ 150 kΩ and VOCL-R ≥ 0.95 V or MFR_SPEC_00[3:0] = 1111b |
67 | 69 | 72 | |||
| VRAMP | Ramp setting | VOCL-R = 0.2 V ±50mV or VOCL-R = 1.0 V ±50mV or MFR_SPEC_14[2:0] = 001b | 30 | 40 | 50 | mVP_P |
| VOCL-R = 0.4 V ±50mV or VOCL-R = 1.2 V ±50mV or MFR_SPEC_14[2:0] = 011b | 70 | 80 | 90 | |||
| VOCL-R = 0.6 V ±50mV or VOCL-R = 1.4 V ±50mV or MFR_SPEC_14[2:0] = 110b | 135 | 145 | 155 | |||
| VOCL-R = 0.8 V ±50mV or VOCL-R = 1.6 V ±50mV or MFR_SPEC_14[2:0] = 111b | 180 | 190 | 205 | |||
| F-IMAX PIN: FREQUENCY AND IMAX SETTINGS | ||||||
| fSW | Switching frequency (See Switching Characteristics) | |||||
| IMAX | IMAX values | VF-IMAX(min) = 0.136V
IMAX=(VF-IMAX /VVREF × 256)-0.5 |
18 | 20 | 22 | A |
| VF-IMAX(min) = 0.535 V
IMAX=(VF-IMAX /VVREF × 256)-0.5 |
78 | 80 | 82 | |||
| VF-IMAX(min) = 0.800 V
IMAX=(VF-IMAX /VVREF × 256)-0.5 |
118 | 120 | 122 | |||
| VF-IMAX(min) = 1.198 V
IMAX=(VF-IMAX /VVREF × 256)-0.5 |
178 | 180 | 182 | |||
| SLEW-MODE PIN: SLEW RATES and MODE SELECTIONS | ||||||
| SLSET | Slew rate setting | RSLEW-MODE ≤ 20 kΩ or MFR_SPEC_13[2:0] = 000b and MFR_SPEC_07[2] = 0b |
0.28 | 0.34 | mV/µs | |
| RSLEW-MODE = 24 kΩ or MFR_SPEC_13[2:0] = 001b and MFR_SPEC_07[2] = 0b |
0.60 | 0.68 | ||||
| RSLEW-MODE = 30 kΩ or MFR_SPEC_13[2:0] = 010b and MFR_SPEC_07[2] = 0b |
0.91 | 1.02 | ||||
| RSLEW-MODE = 39 kΩ or MFR_SPEC_13[2:0] = 011b and MFR_SPEC_07[2] = 0b |
1.22 | 1.36 | ||||
| RSLEW-MODE = 56 kΩ or MFR_SPEC_13[2:0] = 100b and MFR_SPEC_07[2] = 0b |
1.53 | 1.7 | ||||
| RSLEW-MODE = 75 kΩ or MFR_SPEC_13[2:0] = 101b and MFR_SPEC_07[2] = 0b |
1.85 | 2.04 | ||||
| RSLEW-MODE = 100 kΩ or MFR_SPEC_13[2:0] = 110b and MFR_SPEC_07[2] = 0b |
2.16 | 2.38 | ||||
| RSLEW-MODE ≥ 150 kΩ or MFR_SPEC_13[2:0] = 111b and MFR_SPEC_07[2] = 0b |
2.48 | 2.74 | ||||
| RSLEW-MODE ≤ 20 kΩ or MFR_SPEC_13[2:0] = 000b and MFR_SPEC_07[2] = 1b |
1.53 | 1.7 | ||||
| RSLEW-MODE = 24 kΩ or MFR_SPEC_13[2:0] = 001b and MFR_SPEC_07[2] = 1b |
1.85 | 2.04 | ||||
| RSLEW-MODE = 30 kΩ or MFR_SPEC_13[2:0] = 010b and MFR_SPEC_07[2] = 1b |
2.16 | 2.38 | ||||
| RSLEW-MODE = 39 kΩ or MFR_SPEC_13[2:0] = 011b and MFR_SPEC_07[2] = 1b |
2.48 | 2.74 | ||||
| RSLEW-MODE = 56 kΩ or MFR_SPEC_13[2:0] = 100b and MFR_SPEC_07[2] = 1b |
2.79 | 3.08 | ||||
| RSLEW-MODE = 75 kΩ or MFR_SPEC_13[2:0] = 101b and MFR_SPEC_07[2] = 1b |
3.10 | 3.43 | ||||
| RSLEW-MODE = 100 kΩ or MFR_SPEC_13[2:0] = 110b and MFR_SPEC_07[2] = 1b |
3.41 | 3.76 | ||||
| RSLEW-MODE ≥ 150 kΩ or MFR_SPEC_13[2:0] = 111b and MFR_SPEC_07[2] = 1b |
3.73 | 4.13 | ||||
| MODE | MODE bits set(1)
(M3M2M1M0) |
VSLEW-MODE ≤ 0.053 V with ±20 mV tolerance, or MFR_SPEC_13[7:3] = 00x00 |
0000 | |||
| VSLEW-MODE = 0.159 V with ±20 mV tolerance, MFR_SPEC_13[7:3] = 00x01b |
0001 | |||||
| VSLEW-MODE = 0.266 V with ±20 mV tolerance, MFR_SPEC_13[7:3] = 00x10b |
0010 | |||||
| VSLEW-MODE = 0.372V with ±20 mV tolerance, MFR_SPEC_13[7:3] = 00x11b |
0011 | |||||
| VSLEW-MODE = 0.478 V with ±20 mV tolerance, MFR_SPEC_13[7:3] = 01x00b |
0100 | |||||
| VSLEW-MODE = 0.584V with ±20 mV tolerance, MFR_SPEC_13[7:3] = 01x01b |
0101 | |||||
| VSLEW-MODE = 0.691 V with ±20 mV tolerance, MFR_SPEC_13[7:3] = 01x10b |
0110 | |||||
| VSLEW-MODE = 0.797 V with ±20 mV tolerance, MFR_SPEC_13[7:3] = 01x11b |
0111 | |||||
| VSLEW-MODE = 0.903 V with ±20 mV tolerance, MFR_SPEC_13[7:3] = 10x00b |
1000 | |||||
| VSLEW-MODE = 1.009 V with ±20 mV tolerance, MFR_SPEC_13[7:3] = 10x01b |
1001 | |||||
| VSLEW-MODE = 1.116 V with ±20 mV tolerance, MFR_SPEC_13[7:3] = 10x10b |
1010 | |||||
| VSLEW-MODE = 1.222 V with ±20 mV tolerance, MFR_SPEC_13[7:3] = 10x11b |
1011 | |||||
| VSLEW-MODE = 1.328 V with ±20 mV tolerance, MFR_SPEC_13[7:3] = 11x00b |
1100 | |||||
| VSLEW-MODE = 1.434 V with ±20 mV tolerance, MFR_SPEC_13[7:3] = 11x01b |
1101 | |||||
| VSLEW-MODE = 1.541 V with ±20 mV tolerance, MFR_SPEC_13[7:3] = 11x10b |
1110 | |||||
| VSLEW-MODE = 1.615 V with ±10 mV tolerance, MFR_SPEC_13[7:3] = 11x11b |
1111 | |||||
| O-USR PIN: OVERSHOOT AND UNDERSHOOT REDUCTION THRESHOLD SETTING | ||||||
| VOSR | OSR voltage setting | RO-USR ≤ 20 kΩ or MFR_SPEC_09 [2:0] = 000b | 20 | 30 | 40 | mV |
| RO-USR = 24 kΩ or MFR_SPEC_09 [2:0] = 001b | 30 | 40 | 50 | |||
| RO-USR = 30 kΩ or MFR_SPEC_09 [2:0] = 010b | 50 | 60 | 70 | |||
| RO-USR = 39 kΩ or MFR_SPEC_09 [2:0] = 011b | 70 | 80 | 90 | |||
| RO-USR = 56 kΩ or MFR_SPEC_09 [2:0] = 100b | 90 | 100 | 110 | |||
| RO-USR = 75 kΩ or MFR_SPEC_09 [2:0] = 101b | 110 | 120 | 130 | |||
| RO-USR = 100 kΩ or MFR_SPEC_09 [2:0] = 110b | 130 | 140 | 150 | |||
| RO-USR ≥ 150 kΩ or MFR_SPEC_09 [2:0] = 111b | OFF | |||||
| VUSR | USR voltage setting | VO-USR = 0.2 V with ±50 mV tolerance or MFR_SPEC_09 [6:4] = 000b |
10 | 20 | 30 | mV |
| VO-USR = 0.4 V with ±50 mV tolerance or MFR_SPEC_09 [6:4] = 001b |
20 | 30 | 40 | |||
| VO-USR = 0.6 V with ±50 mV tolerance or MFR_SPEC_09 [6:4] = 010b |
50 | 60 | 70 | |||
| VO-USR = 0.8 V with ±50 mV tolerance or MFR_SPEC_09 [6:4] = 011b |
70 | 80 | 90 | |||
| VO-USR = 1.0 V with ±50 mV tolerance or MFR_SPEC_09 [6:4] = 100b |
90 | 100 | 110 | |||
| VO-USR = 1.2 V with ±50 mV tolerance or MFR_SPEC_09 [6:4] = 101b |
110 | 120 | 130 | |||
| VO-USR = 1.4 V with ±50 mV tolerance or MFR_SPEC_09 [6:4] = 110b |
130 | 140 | 150 | |||
| 1.55 V ≤ VO-USR ≤ 1.6 V or MFR_SPEC_09 [6:4] = 111b |
OFF | |||||
| VOSRHYS | OSR voltage hysteresis(1) | All settings | 10 | mV | ||
| VUSRHYS | USR voltage hysteresis(1) | All settings | 10 | mV | ||
| VBOOT PIN: BOOT VOLTAGE SETTING | ||||||
| VBOOT (1) | BOOT voltage setting (B3B2B1) | RVBOOT ≤ 20 kΩ, or MFR_SPEC_11 [3:1] = 000b | 000 | |||
| RVBOOT = 24 kΩ, or MFR_SPEC_11 [3:1] = 001b | 001 | |||||
| RVBOOT = 30 kΩ, or MFR_SPEC_11 [3:1] = 010b | 010 | |||||
| RVBOOT = 39 kΩ, or MFR_SPEC_11 [3:1] = 011b | 011 | |||||
| RVBOOT = 56 kΩ, or MFR_SPEC_11 [3:1] = 100b | 100 | |||||
| RVBOOT = 75 kΩ, or MFR_SPEC_11 [3:1] = 101b | 101 | |||||
| RVBOOT = 100 kΩ, or MFR_SPEC_11 [3:1] = 110b | 110 | |||||
| RVBOOT ≥ 150 kΩ, or MFR_SPEC_11 [3:1] = 111b | 111 | |||||
| BOOT voltage setting (B7B6B5B4) | VVBOOT ≤ 0.053 V with ±20 mV tolerance, or MFR_SPEC_11 [7:4] = 0000b | 0000 | ||||
| VVBOOT = 0.159 V with ±20 mV tolerance, or MFR_SPEC_11 [7:4] = 0001b | 0001 | |||||
| VVBOOT= 0.266 V with ±20 mV tolerance, or MFR_SPEC_11 [7:4] = 0010b | 0010 | |||||
| VVBOOT = 0.372 V with ±20 mV tolerance, or MFR_SPEC_11 [7:4] = 0011b | 0011 | |||||
| VVBOOT = 0.478 V with ±20 mV tolerance, or MFR_SPEC_11 [7:4] = 0100b | 0100 | |||||
| VVBOOT = 0.584 V with ±20 mV tolerance, or MFR_SPEC_11 [7:4] = 0101b | 0101 | |||||
| VVBOOT = 0.691 V with ±20 mV tolerance, or MFR_SPEC_11 [7:4] = 0110b | 0110 | |||||
| VVBOOT = 0.797 V with ±20 mV tolerance, or MFR_SPEC_11 [7:4] = 0111b | 0111 | |||||
| VVBOOT = 0.903 V with ±20 mV tolerance, or MFR_SPEC_11 [7:4] = 1000b | 1000 | |||||
| VVBOOT = 1.009 V with ±20 mV tolerance, or MFR_SPEC_11 [7:4] = 1001b | 1001 | |||||
| VVBOOT = 1.116 V with ±20 mV tolerance, or MFR_SPEC_11 [7:4] = 1010b | 1010 | |||||
| VVBOOT = 1.222 V with ±20 mV tolerance, or MFR_SPEC_11 [7:4] = 1011b | 1011 | |||||
| VVBOOT = 1.328 V with ±20 mV tolerance, or MFR_SPEC_11 [7:4] = 1100b | 1100 | |||||
| VVBOOT = 1.434 V with ±20 mV tolerance, or MFR_SPEC_11 [7:4] = 1101b | 1101 | |||||
| VVBOOT = 1.541 V with ±20 mV tolerance, or MFR_SPEC_11 [7:4] = 1110b | 1110 | |||||
| VVBOOT = 1.615 V with ±10 mV tolerance, or MFR_SPEC_11 [7:4] = 1111b | 1111 | |||||
| PROTECTION: OVP, UVP, VR_RDY | ||||||
| VOVPFP | Pre-bias OVP voltage threshold(1) | ENABLE is low and VVSP > VOVPFP, PWM → LO | 2.75 | V | ||
| VOVPF5 | Fixed OVP voltage threshold (VR12.5) | ENABLE is high and (VVSP–VVSN) > VOVPH5 for 1 μs, PWM → LO, VOUT(max) ≤ 1.8 V |
2.2 | V | ||
| 1.8 V < VOUT(max) ≤ 2.0 V | 2.4 | |||||
| 2.0 V < VOUT(max) ≤ 2.2 V | 2.6 | |||||
| VOUT(max) > 2.2 V | 2.8 | |||||
| VOVPF0 | Fixed OVP voltage threshold (VR12.0) | ENABLE is high and (VVSP–VVSN) > VOVPH5 for 1 μs, PWM → LO, | 1.7 | 1.75 | 1.8 | |
| VRDYH5 | VR_RDY High Threshold (VR 12.5) (Tracking OVP Threshold) |
Measured at the VSP pin wrt/VID code. IC latches OFF.MFR_SPEC_21<4:3>=00b | 300 | 350 | 400 | mV |
| Measured at the VSP pin wrt/VID code. IC latches OFF.MFR_SPEC_21<4:3>=01b (Default) | 400 | 450 | 500 | |||
| Measured at the VSP pin wrt/VID code. IC latches OFF.MFR_SPEC_21<4:3>=10b | 500 | 550 | 600 | |||
| Measured at the VSP pin wrt/VID code. IC latches OFF.MFR_SPEC_21<4:3>=11b | 600 | 650 | 700 | |||
| VRDYH0 | VR_RDY High Threshold (VR 12.0) (Tracking OVP Threshold) |
Measured at the VSP pin wrt/VID code. IC latches OFF.MFR_SPEC_21<4:3>=00b | 150 | 175 | 200 | mV |
| Measured at the VSP pin wrt/VID code. IC latches OFF.MFR_SPEC_21<4:3>=01b (Default) | 200 | 225 | 250 | |||
| Measured at the VSP pin wrt/VID code. IC latches OFF.MFR_SPEC_21<4:3>=10b | 250 | 235 | 300 | |||
| Measured at the VSP pin wrt/VID code. IC latches OFF.MFR_SPEC_21<4:3>=11b | 300 | 325 | 350 | |||
| VRDYL | VR_RDY low (UVP) threshold | Measured at the VSP pin w/r/t VID code, device latches OFF | 175 | 207 | 235 | mV |
| tRDYDGLTO | VR_RDY deglitch time | Time from VSP out of overvoltage threshold to VR_RDY low | 1 | µs | ||
| tRDYDGLTU | VR_RDY deglitch time | Time from VSP out of undervoltage threshold to VR_RDY low, (ƒSW = 500 kHz) | 32 | µs | ||
| tHICCUP | Hiccup delay after UVP and OCP | 22 | ms | |||
| TSEN PIN AND THERMAL SHUTDOWN: THERMAL VOLTAGE LEVELS | ||||||
| VTSEN | Thermal voltage definition | TJ = 90°C | 1.32 | V | ||
| TJ = 95°C | 1.36 | |||||
| TJ = 100°C | 1.4 | |||||
| TJ = 105°C | 1.44 | |||||
| TJ = 110°C | 1.48 | |||||
| TJ = 115°C | 1.52 | |||||
| TJ = 120°C | 1.56 | |||||
| TJ = 125°C | 1.6 | |||||
| ITSEN | TSEN current | Leakage current | –3 | 3 | µA | |
| OTPTHLD | Over temperature protection threshold | Based on the temperature measured on TSEN pin, default value | 125 | °C | ||
| OTPHYS | Over temperature protection hysteresis | 15 | °C | |||
| PWM and SKIP-NVM OUTPUT: I/O VOLTAGE AND CURRENT°C | ||||||
| VPWML | PWMx output low level | ILOAD = -1 mA | 0.15 | 0.3 | V | |
| VPWMH | PWMx output high Level | ILOAD = +1 mA | 2.5 | V | ||
| V SKIP-NVM_L | SKIP-NVM output low Level | ILOAD = –1 mA | 0.15 | 0.3 | V | |
| V SKIP-NVM_H | SKIP-NVM output high Level | ILOAD = +1 mA | 2.5 | V | ||
| RP-S_UV | PWMx//SKIP-NVM resistance(1) | ENABLE = LOW, or UVLO | 10 | MΩ | ||
| DYNAMIC PHASE SHEDDING: THRESHOLDS | ||||||
| IDPSTHL | Dynamic phase add/drop low threshold current | MFR_SPEC_15 [3] = 0b | N.A | A | ||
| MFR_SPEC_15 [3] = 1b | 10% × 4 × IOCLx | |||||
| IDPSTHH | Dynamic phase add/drop high threshold voltage | MFR_SPEC_15 [2:0] = 000b | 15% × 4 × IOCLx | A | ||
| MFR_SPEC_15 [2:0] = 001b | 20% × 4 × IOCLx | |||||
| MFR_SPEC_15 [2:0] = 010b | 25% × 4 × IOCLx | |||||
| MFR_SPEC_15 [2:0] = 011b | 30% × 4 × IOCLx | |||||
| MFR_SPEC_15 [2:0] = 1xxb | 35% × 4 × IOCLx | |||||
| IDPSTH46 | Dynamic phase add/drop 4-6 threshold voltage | 60% × 4 × IOCLx | A | |||
| IDPSHYS | Dynamic phase add/drop high hysteresis voltage | Hysteresis | 5% × 4 × IOCLx | A | ||
| IDPSHYS46 | Dynamic phase add/drop 6-4 hysteresis voltage | Hysteresis | 10% × 4 × IOCLx | |||
| PROGRAMMABLE DROOP SETTING | ||||||
| DROOP | Droop percentage settings | MFR_SPEC_08 [7:0] = 00h | 0 | % | ||
| MFR_SPEC_08 [7:0] = 01h | 25 | |||||
| MFR_SPEC_08 [7:0] = 02h | 50 | |||||
| MFR_SPEC_08 [7:0] = 03h | 75 | |||||
| MFR_SPEC_08 [7:0] = 04h (Default Setting) | 100 | |||||
| MFR_SPEC_08 [7:0] = 10h | 80 | |||||
| MFR_SPEC_08 [7:0] = 20h | 85 | |||||
| MFR_SPEC_08 [7:0] = 30h | 90 | |||||
| MFR_SPEC_08 [7:0] = 40h | 95 | |||||
| MFR_SPEC_08 [7:0] = 50h | 105 | |||||
| MFR_SPEC_08 [7:0] = 60h | 110 | |||||
| MFR_SPEC_08 [7:0] = 70h | 115 | |||||
| MFR_SPEC_08 [7:0] = 80h | 120 | |||||
| MFR_SPEC_08 [7:0] = 90h | 125 | |||||
| MFR_SPEC_08 [7:0] = A0h | 150 | |||||
| CURRENT SHARING FAULT: THRESHOLDS | ||||||
| IPHFLT | Current Sharing Faa=ult Threshold | MFR_SPEC_19<2:0>000b; | 3 | A | ||
| MFR_SPEC_19<2:0>001b; | 5 | |||||
| MFR_SPEC_19<2:0>010b; | 7 | |||||
| MFR_SPEC_19<2:0>011b; | 9 | |||||
| MFR_SPEC_19<2:0>100b; | 11 | |||||
| MFR_SPEC_19<2:0>101b; | 15 | |||||
| MFR_SPEC_19<2:0>110b; | 20 | |||||
| MFR_SPEC_19<2:0>111b; | OFF | |||||
| SKIP-NVM PIN: PROGRAM MODE SETTING (NVM OR PINSTRAP) | ||||||
| PGRM | Program mode for the configurations | RSKIP-NVM ≤ 20 kΩ | Pinstrap | Program Mode |
||
| RSKIP-NVM ≥ 100 kΩ | NVM | |||||
| IMON PIN: CURRENT MONITOR | ||||||
| IIMON4LK | 0% IMAX level current output | 6 phase, IMAX=120A, Σ iL = 0 A, RIMON=49.9kΩ | 0 | 4 | A | |
| IIMON4LO | 20% IMAX level current output | 6 phase, IMAX=120A, Σ iL = 24 A, RIMON=49.9kΩ | 20 | 24 | 28 | A |
| IIMON4MID | 100% IMAX level current output | 6 phase, IMAX=120A, Σ iL = 120 A, RIMON=49.9kΩ | 115.8 | 120.8 | 125.8 | A |
| IIMON4HI | 125% IMAX level current output | 6 phase, IMAX=120A, Σ iL = 150 A, RIMON=49.9kΩ | 145 | 151 | 157 | A |
| VOUT MEASUREMENT: READ_VOUT | ||||||
| MVOUT(rng) | VOUT measurement range | 0.5 | 2.1 | V | ||
| READ_VOUT accuracy | 0.5 V ≤ VOUT < 0.7 V, VR12.0 mode | -2 | +2 | VID | ||
| 0.7V ≤ VOUT ≤ 1.0 V, VR12.0 mode | -1 | +1 | ||||
| 1.0V < VOUT ≤ 1.52 V, VR12.0 mode | -2 | +2 | ||||
| 0.5 V ≤ VOUT ≤ 2.1V, VR12.5 mode, (Ta=0°C to 85°C) | -1 | +1 | ||||
| MFR_READ_VOUT accuracy | 0.5 V ≤ VOUT < 0.7 V, VR12.0 mode | -12.5 | 12.5 | mV | ||
| 0.7V ≤ VOUT ≤ 1.0 V, VR12.0 mode | -7.5 | 7.5 | ||||
| 1.0V < VOUT ≤ 1.52 V, VR12.0 mode | -10 | 10 | ||||
| 0.5 V ≤ VOUT ≤ 2.1V, VR12.5 mode, (Ta=0°C to 85°C) | -12.5 | 12.5 | ||||
(1) Specified by design. Not production tested.
6.6 I/O Timing Requirements
| MIN | TYP | MAX | UNIT | |||
|---|---|---|---|---|---|---|
| tSTARTUP1 | Startup time | VBOOT> 0 V, no faults, time from V3R3 high to VOUT ramp, CVREF = 1 µF | 1.2 | ms | ||
| tSTARTUP2 | Startup time | VBOOT> 0 V, no faults, time from V3R3 high until the controller responds to PMBus commands, CVREF = 1 µF | 1.5 | ms | ||
| tRDY_POD | VR_RDY power-on-delay time(1) | DAC settled to VR_RDY going high | 1 | ms | ||
| tOFF_MIN | Controller minimum OFF time(1) | Fixed value | 20 | 50 | 80 | ns |
| tEN_RDY | ENABLE low to VR_RDY low | 100 | ns | |||
| tRDY_VSP | VR_RDY low to VSP change(1) | 100 | ns | |||
(1) Specified by design. Not production tested.
6.7 Switching Characteristics
TA = 25°C. (unless otherwise noted)| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| F-IMAX PIN: FREQUENCY | ||||||
| fSW | Switching frequency | VVIN = 12 V, VVSP = 1.7 V RF-IMAX = 20 kΩ and MFR_SPEC_12[7] = 0b ; or MFR_SPEC_12[7:4] = 0000b |
270 | 300 | 330 | kHz |
| VVIN = 12 V, VVSP = 1.7 V RF-IMAX = 24 kΩ and MFR_SPEC_12[7] = 0b ; or MFR_SPEC_12[7:4] = 0001b |
360 | 400 | 440 | |||
| VVIN = 12 V, VVSP = 1.7 V RF-IMAX = 30 kΩ and MFR_SPEC_12[7] = 0b ; or MFR_SPEC_12[7:4] = 0010b |
450 | 500 | 550 | |||
| VVIN = 12 V, VVSP = 1.7 V RF-IMAX = 39 kΩ and MFR_SPEC_12[7] = 0b ; or MFR_SPEC_12[7:4] = 0011b |
540 | 600 | 660 | |||
| VVIN = 12 V, VVSP = 1.7 V RF-IMAX = 56 kΩ and MFR_SPEC_12[7] = 0b ; or MFR_SPEC_12[7:4] = 0100b |
630 | 700 | 770 | |||
| VVIN = 12 V, VVSP = 1.7 V RF-IMAX = 75 kΩ and MFR_SPEC_12[7] = 0b ; or MFR_SPEC_12[7:4] = 0101b |
720 | 800 | 880 | |||
| VVIN = 12 V, VVSP = 1.7 V RF-IMAX = 100 kΩ and MFR_SPEC_12[7] = 0b ; or MFR_SPEC_12[7:4] = 0110b |
810 | 900 | 990 | |||
| VVIN = 12 V, VVSP = 1.7 V RF-IMAX = 150 kΩ and MFR_SPEC_12[7] = 0b ; or MFR_SPEC_12[7:4] = 0111b |
900 | 1000 | 1100 | |||
| VVIN = 12 V, VVSP = 1.7 V RF-IMAX = 20 kΩ and MFR_SPEC_12[7] = 1b ; or MFR_SPEC_12[7:4] = 1000b |
315 | 350 | 385 | |||
| VVIN = 12 V, VVSP = 1.7 V RF-IMAX = 24 kΩ and MFR_SPEC_12[7] = 1b ; or MFR_SPEC_12[7:4] = 1001b |
405 | 450 | 495 | |||
| VVIN = 12 V, VVSP = 1.7 V RF-IMAX = 30 kΩ and MFR_SPEC_12[7] = 1b ; or MFR_SPEC_12[7:4] = 1010b |
495 | 550 | 605 | |||
| VVIN = 12 V, VVSP = 1.7 V RF-IMAX = 39 kΩ and MFR_SPEC_12[7] = 1b ; or MFR_SPEC_12[7:4] = 1011b |
585 | 650 | 715 | |||
| VVIN = 12 V, VVSP = 1.7 V RF-IMAX = 56 kΩ and MFR_SPEC_12[7] = 1b ; or MFR_SPEC_12[7:4] = 1100b |
675 | 750 | 825 | |||
| VVIN = 12 V, VVSP = 1.7 V RF-IMAX = 75 kΩ and MFR_SPEC_12[7] = 1b ; or MFR_SPEC_12[7:4] = 1101b |
765 | 850 | 935 | |||
| VVIN = 12 V, VVSP = 1.7 V RF-IMAX = 100 kΩ and MFR_SPEC_12[7] = 1b ; or MFR_SPEC_12[7:4] = 1110b |
855 | 950 | 1045 | |||
| VVIN = 12 V, VVSP = 1.7 V RF-IMAX = 150kΩ and MFR_SPEC_12[7] = 1b ; or MFR_SPEC_12[7:4] = 1111b |
900 | 1000 | 1100 | |||
6.8 Typical Characteristics
Figure 1. VIN Supply Current vs Junction Temperature
Figure 2. V5 Supply Current vs Junction Temperature
