Table 2. Typical Application Circuit Components

8.2.1 Design Requirements

8.2.2 Detailed Design Procedure

Figure 19 shows a simplified buck converter system using D-CAP Mode.

Figure 19. Simplifying the Modulator

The output voltage is compared with an internal reference voltage after divider resistors, R1 and R2. The PWM comparator determines the timing to turn on the high-side MOSFET. The gain and speed of the comparator is high enough to keep the voltage at the beginning of each on cycle (or the end of off cycle) substantially constant. The DC output voltage may have line regulation due to ripple amplitude that slightly increases as the input voltage increase.

For the loop stability, the 0-dB frequency, f₀, defined in Equation 4 needs to be lower than 1/4 of the switching frequency.

Equation 4.

As f₀ is determined solely by the output capacitor’s characteristics, loop stability of D-CAP Mode is determined by the capacitor’s chemistry. For example, specialty polymer capacitors (SP-CAP) have Co in the order of several 100 μF and ESR in range of 10 mΩ. These make f₀ in the order of 100 kHz or less and the loop is stable. However, ceramic capacitors have f₀ at more than 700 kHz, which is not suitable for this operational mode.

Although D-CAP Mode provides many advantages such as ease-of-use, minimum external components configuration, and extremely short response time, a sufficient amount of feedback signal needs to be provided by an external circuit to reduce jitter level. This is due to not employing an error amplifier in the loop. The required signal level is approximately 10 mV at the comparing point (VFB terminal). This gives Vripple at the output node as shown in the following equation.

Equation 5.

The output capacitor's ESR should meet this requirement.

The external components selection is much simpler in D-CAP Mode.

1. Determine the value of R1 and R2.

Recommended R2 value is from 10 kΩ to 100 kΩ. Determine R1 using the following equation.

Equation 6.
2. Choose inductor.

The inductance value should be determined to give the ripple current of approximately 1/4 to 1/2 of maximum output current. Larger ripple current increases the output ripple voltage, improves S/N ratio, and contributes to a stable operation.

Equation 7.

The inductor also needs to have low DCR to achieve good efficiency, as well as enough room above peak inductor current before saturation. The peak inductor current can be estimated as follows.

Equation 8.
3. Choose output capacitor(s).

Organic semiconductor capacitor(s) or specialty polymer capacitor(s) are recommended. Determine ESR to meet the required ripple voltage indicated previously. A quick approximation is shown here:

Equation 9.

8.2.3 Application Curves

Figure 20. 1.05-V Load Transient Response

Figure 22. 1.05-V Start-Up Waveforms

Figure 24. 1.05-V Discharge Waveforms

Figure 21. 1.5-V Load Transient Response

Figure 23. 1.5-V Start-Up Waveforms

(1) The data of – are measured from the Typical Application Circuit of and

Figure 25. 1.5-V Discharge Waveforms