ZHCS189E June 2011 – December 2015 TPS43335-Q1 , TPS43336-Q1
PRODUCTION DATA.
| VALUE | UNIT | ||||
|---|---|---|---|---|---|
| V(ESD) | Electrostatic discharge | Human-body model (HBM), per AEC Q100-002(1) | ±2000 | V | |
| Charged-device model (CDM), per AEC Q100-011 |
FBA, FBB, RT, DLYAB | ±400 | |||
| VBAT, ENC, SYNC, VIN | ±750 | ||||
| All other pins | ±500 | ||||
| Machine model (MM) | PGA, PGB | ±150 | |||
| All other pins | ±200 | ||||
| MIN | MAX | UNIT | ||
|---|---|---|---|---|
| Buck function: BuckA and BuckB voltage |
Input voltage: VIN, VBAT | 4 | 40 | V |
| Enable inputs: ENA, ENB | 0 | 40 | ||
| Boot inputs: CBA, CBB | 4 | 48 | ||
| Phase inputs: PHA, PHB | –0.6 | 40 | ||
| Current-sense voltage: SA1, SA2, SB1, SB2 | 0 | 11 | ||
| Power-good output: PGA, PGB | 0 | 11 | ||
| SYNC, EXTSUP | 0 | 9 | ||
| Boost function | Enable input: ENC | 0 | 9 | V |
| Voltage sense: DS | 40 | |||
| DIV | 0 | VREG | ||
| Operating temperature, TA | –40 | 125 | °C | |
| THERMAL METRIC(1) | TPS4333x-Q1 | UNIT | |
|---|---|---|---|
| DAP (HTSSOP) | |||
| 38 PINS | |||
| RθJA | Junction-to-ambient thermal resistance | 27.3 | °C/W |
| RθJC(top) | Junction-to-case (top) thermal resistance | 19.6 | °C/W |
| RθJB | Junction-to-board thermal resistance | 15.9 | °C/W |
| ψJT | Junction-to-top characterization parameter | 0.24 | °C/W |
| ψJB | Junction-to-board characterization parameter | 6.6 | °C/W |
| RθJC(bot) | Junction-to-case (bottom) thermal resistance | 1.2 | °C/W |
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| INPUT SUPPLY | ||||||
| VBAT | Supply voltage | Boost controller enabled, after satisfying initial start-up condition | 2 | 40 | V | |
| VIN | Input voltage required for device on initial start-up | 6.5 | 40 | V | ||
| Buck regulator operating range after initial start-up | 4 | 40 | ||||
| VIN(UV) | Buck undervoltage lockout | VIN falling. After a reset, initial start-up conditions may apply.(3) | 3.5 | 3.6 | 3.8 | V |
| VIN rising. After a reset, initial start-up conditions may apply.(3) | 3.8 | 4 | V | |||
| VBOOST_UNLOCK | Boost unlock threshold | VBAT rising | 8.2 | 8.5 | 8.8 | V |
| Iq_LPM_ | LPM quiescent current: (1) |
VIN = 13 V, BuckA: LPM, BuckB: off, TA = 25°C | 30 | 40 | µA | |
| VIN = 13 V, BuckB: LPM, BuckA: off, TA = 25°C | 30 | 40 | ||||
| VIN = 13 V, BuckA, B: LPM, TA = 25°C | 35 | 45 | µA | |||
| Iq_LPM | LPM quiescent current: (1) |
VIN = 13 V, BuckA: LPM, BuckB: off, TA = 125°C | 40 | 50 | µA | |
| VIN = 13 V, BuckB: LPM, BuckA: off, TA = 125°C | 40 | 50 | ||||
| VIN = 13 V, BuckA, B: LPM, TA = 125°C | 45 | 55 | µA | |||
| Iq_NRM | Quiescent current: normal (PWM) mode(1) |
SYNC = HIGH, TA = 25°C | 4.85 | 5.3 | mA | |
| VIN = 13 V, BuckA: CCM, BuckB: off, TA = 25°C | 4.85 | 5.3 | ||||
| VIN = 13 V, BuckB: CCM, BuckA: off, TA = 25°C | 4.85 | 5.3 | ||||
| VIN = 13 V, BuckA, B: CCM, TA = 25°C | 7 | 7.6 | ||||
| Iq_NRM | Quiescent current: normal (PWM) mode(1) |
SYNC = HIGH, TA = 125°C | 5 | 5.5 | mA | |
| VIN = 13 V, BuckA: CCM, BuckB: off, TA = 125°C | 5 | 5.5 | ||||
| VIN = 13 V, BuckB: CCM, BuckA: off, TA = 125°C | 5 | 5.5 | ||||
| VIN = 13 V, BuckA, B: CCM, TA = 125°C | 7.5 | 8 | ||||
| Ibat_sh | Shutdown current | BuckA, B: off, VBAT = 13 V , TA = 25°C | 2.5 | 4 | µA | |
| Ibat_sh | Shutdown current | BuckA, B: off, VBAT = 13 V, TA = 125°C | 3 | 5 | µA | |
| INPUT VOLTAGE VBAT - UNDERVOLTAGE LOCKOUT | ||||||
| VBAT(UV) | Boost-input undervoltage | VBAT falling. After a reset, initial start-up conditions may apply.(3) | 1.8 | 1.9 | 2 | V |
| VBAT rising. After a reset, initial start-up conditions may apply.(3) | 2.4 | 2.5 | 2.6 | V | ||
| UVLOHys | Hysteresis | 500 | 600 | 700 | mV | |
| UVLOfilter | Filter time | 5 | µs | |||
| INPUT VOLTAGE VIN - OVERVOLTAGE LOCKOUT | ||||||
| VOVLO | Overvoltage shutdown | VIN rising | 45 | 46 | 47 | V |
| VIN falling | 43 | 44 | 45 | |||
| OVLOHys | Hysteresis | 1 | 2 | 3 | V | |
| OVLOfilter | Filter time | 5 | µs | |||
| BOOST CONTROLLER | ||||||
| Vboost7V | Boost VOUT = 7 V | DIV = low, VBAT = 2 V to 7 V | 6.8 | 7 | 7.3 | V |
| Vboost7V-th | Boost-enable threshold | Boost VOUT = 7 V, VBAT falling | 7.5 | 8 | 8.5 | V |
| Boost-disable threshold | Boost VOUT = 7 V, VBAT rising | 8 | 8.5 | 9 | ||
| Boost hysteresis | Boost VOUT = 7 V, VBAT rising or falling | 0.4 | 0.5 | 0.6 | ||
| Vboost10V | Boost VOUT = 10 V | DIV = open, VBAT = 2 V to 10 V | 9.7 | 10 | 10.4 | V |
| Vboost10V-th | Boost-enable threshold | Boost VOUT = 10 V, VBAT falling | 10.5 | 11 | 11.5 | V |
| Boost-disable threshold | Boost VOUT = 10 V, VBAT rising | 11 | 11.5 | 12 | ||
| Boost hysteresis | Boost VOUT = 10 V, VBAT rising or falling | 0.4 | 0.5 | 0.6 | ||
| Vboost11V | Boost VOUT = 11 V | DIV = VREG, VBAT = 2 V to 11 V | 10.7 | 11 | 11.4 | V |
| Vboost11V-th | Boost-enable threshold | Boost VOUT = 11 V, VBAT falling | 11.5 | 12 | 12.5 | V |
| Boost-disable threshold | Boost VOUT = 11 V, VBAT rising | 12 | 12.5 | 13 | ||
| Boost hysteresis | Boost VOUT = 11 V, VBAT rising or falling | 0.4 | 0.5 | 0.6 | ||
| BOOST-SWITCH CURRENT LIMIT | ||||||
| VDS | Current-limit sensing | DS input with respect to PGNDA | 0.175 | 0.2 | 0.225 | V |
| tDS | Leading-edge blanking | 200 | ns | |||
| GATE DRIVER FOR BOOST CONTROLLER | ||||||
| IGC1 Peak | Gate-driver peak current | 1.5 | A | |||
| rDS(on) | Source and sink driver | VREG = 5.8 V, IGC1 current = 200 mA | 2 | Ω | ||
| GATE DRIVER FOR PMOS | ||||||
| rDS(on) | PMOS OFF | 10 | 20 | Ω | ||
| IPMOS_ON | Gate current | VIN = 13.5 V, VGS = –5 V | 10 | mA | ||
| tdelay_ON | Turnon delay | C = 10 nF | 5 | 10 | µs | |
| BOOST-CONTROLLER SWITCHING FREQUENCY | ||||||
| fsw-Boost | Boost switching frequency | fSW_Buck / 2 | kHz | |||
| DBoost | Boost duty cycle | 90% | ||||
| ERROR AMPLIFIER (OTA) FOR BOOST CONVERTERS | ||||||
| GmBOOST | Forward transconductance | VBAT = 12 V | 0.8 | 1.35 | mS | |
| VBAT = 5 V | 0.35 | 0.65 | ||||
| BUCK CONTROLLERS | ||||||
| VBuckA or VBuckB | Adjustable output-voltage range | 0.9 | 11 | V | ||
| Vref, NRM | Internal reference and tolerance voltage in normal mode | Measure FBX pin | 0.792 | 0.800 | 0.808 | V |
| –1% | 1% | |||||
| Vref, LPM | Internal reference and tolerance voltage in low-power mode | Measure FBX pin | 0.784 | 0.800 | 0.816 | V |
| –2% | 2% | |||||
| Vsense | V sense for forward-current limit in CCM | FBx = 0.75 V (low duty cycle) | 60 | 75 | 90 | mV |
| V sense for reverse-current limit in CCM | FBx = 1 V | –65 | –37.5 | –23 | mV | |
| VI-Foldback | V sense for output short | FBx = 0 V | 17 | 32.5 | 48 | mV |
| tdead | Shoot-through delay, blanking time | 20 | ns | |||
| DCNRM | High-side minimum on-time | 100 | ns | |||
| Maximum duty cycle (digitally controlled) | 98.75% | |||||
| DCLPM | Duty cycle, LPM | 80% | ||||
| ILPM_Entry | LPM entry-threshold load current as fraction of maximum set load current | 1% | See(2) | |||
| ILPM_Exit | LPM exit-threshold load current as fraction of maximum set load current | See(2) | 10% | |||
| HIGH-SIDE EXTERNAL NMOS GATE DRIVERS FOR BUCK CONTROLLER | ||||||
| IGX1_peak | Gate-driver peak current | 0.7 | A | |||
| rDS(on) | Source and sink driver | VREG = 5.8 V, IGX1 current = 200 mA | 4 | Ω | ||
| LOW-SIDE NMOS GATE DRIVERS FOR BUCK CONTROLLER | ||||||
| IGX2_peak | Gate driver peak current | 0.7 | A | |||
| RDS ON | Source and sink driver | VREG = 5.8 V, IGX2 current = 200 mA | 4 | Ω | ||
| ERROR AMPLIFIER (OTA) FOR BUCK CONVERTERS | ||||||
| GmBUCK | Transconductance | COMPA, COMPB = 0.8 V, source/sink = 5 µA, test in feedback loop |
0.72 | 1 | 1.35 | mS |
| IPULLUP_FBx | Pullup current at FBx pins | FBx = 0 V | 50 | 100 | 200 | nA |
| DIGITAL INPUTS: ENA, ENB, ENC, SYNC | ||||||
| VIH | Higher threshold | VIN= 13 V | 1.7 | V | ||
| VIL | Lower threshold | VIN = 13 V | 0.7 | V | ||
| RIH_SYNC | Pulldown resistance on SYNC | VSYNC = 5 V | 500 | kΩ | ||
| RIL_ENC | Pulldown resistance on ENC | VENC = 5 V | 500 | kΩ | ||
| IIL_ENx | Pullup current source on ENA, ENB | VENx = 0 V, | 0.5 | 2 | µA | |
| BOOST OUTPUT VOLTAGE: DIV | ||||||
| VIH_DIV | Higher threshold | VREG = 5.8 V | VREG – 0.2 | V | ||
| VIL_DIV | Lower threshold | 0.2 | V | |||
| Voz_DIV | Voltage on DIV if unconnected | Voltage on DIV if unconnected | VREG / 2 | V | ||
| SWITCHING PARAMETER – BUCK DC-DC CONTROLLERS | ||||||
| fSW_Buck | Buck switching frequency | RT pin: GND | 360 | 400 | 440 | kHz |
| fSW_Buck | Buck switching frequency | RT pin: 60-kΩ external resistor | 360 | 400 | 440 | kHz |
| fSW_adj | Buck adjustable range with external resistor | RT pin: external resistor | 150 | 600 | kHz | |
| fSYNC | Buck synchronization range | External clock input | 150 | 600 | kHz | |
| fSS | Spread-spectrum spreading | TPS43336-Q1 only | 5% | |||
| INTERNAL GATE-DRIVER SUPPLY | ||||||
| VREG | Internal regulated supply | VIN = 8 V to 18 V, VEXTSUP = 0 V, SYNC = high | 5.5 | 5.8 | 6.1 | V |
| Load regulation | IVREG = 0 mA to 100 mA, VEXTSUP = 0 V, SYNC = high |
0.2% | 1% | |||
| VREG(EXTSUP) | Internal regulated supply | VEXTSUP = 8.5 V | 7.2 | 7.5 | 7.8 | V |
| Load regulation | IEXTSUP = 0 mA to 125 mA, SYNC = High VEXTSUP = 8.5 V to 13 V |
0.2% | 1% | |||
| VEXTSUP-th | EXTSUP switch-over voltage threshold | IVREG = 0 mA to 100 mA, VEXTSUP ramping positive |
4.4 | 4.6 | 4.8 | V |
| VEXTSUP-Hys | EXTSUP switch-over hysteresis | 150 | 250 | mV | ||
| IVREG-Limit | Current limit on VREG | VEXTSUP = 0 V, normal mode as well as LPM | 100 | 400 | mA | |
| IVREG_EXTSUP-Limit | Current limit on VREG when using EXTSUP | IVREG = 0 mA to 100 mA, VEXTSUP = 8.5 V, SYNC = High |
125 | 400 | mA | |
| SOFT START | ||||||
| ISSx | Soft-start source current | VSSA and VSSB = 0 V | 0.75 | 1 | 1.25 | µA |
| OSCILLATOR (RT) | ||||||
| VRT | Oscillator reference voltage | 1.2 | V | |||
| POWER GOOD / DELAY | ||||||
| PGpullup | Pullup for A and B to Sx2 | 50 | kΩ | |||
| PGth1 | Power-good threshold | FBx falling | –5% | –7% | –9% | |
| PGhys | Hysteresis | 2% | ||||
| PGdrop | Voltage drop | IPGA = 5 mA | 450 | mV | ||
| IPGA = 1 mA | 100 | mV | ||||
| PGleak | Power-good leakage | VSx2 = VPGx = 13 V | 1 | µA | ||
| tdeglitch | Power-good deglitch time | 2 | 16 | µs | ||
| tdelay | Reset delay | External capacitor = 1 nF VBuckX < PGth1 |
1 | ms | ||
| tdelay_fix | Fixed reset delay | No external capacitor, pin open | 20 | 50 | µs | |
| IOH | Activate current source (current to charge external capacitor) | 30 | 40 | 50 | µA | |
| IIL | Activate current sink (current to discharge external capacitor) | 30 | 40 | 50 | µA | |
| OVERTEMPERATURE PROTECTION | ||||||
| Tshutdown | Junction-temperature shutdown threshold | 150 | 165 | °C | ||
| Thys | Junction-temperature hysteresis | 15 | °C | |||
| VIN = 12 V | L= 4.7 µH | fSW = 400 kHz |
| VOUT = 5 V | RSENSE = 10 Ω |
| VIN = 12 V | L= 4.7 µH | fSW = 400 kHz |
| VOUT = 5 V | RSENSE = 10 Ω |
| VIN = 12 V | L= 4.7 µH | fSW = 400 kHz |
| VOUT = 5 V | RSENSE = 10 Ω |
| VIN (BOOST OUTPUT) = 10 V | fSW = 200 kHz | |
| L = 1 µH | RSENSE = 7.5 mΩ | |
| VIN (BOOST OUTPUT) = 10 V | fSW = 200 kHz | |
| BuckA = 5 V AT 1.5 A | CIN = 440 µF | L = 1 µH |
| BuckB = 3.3 V AT 3.5 A | COUT = 660 µF | RSENSE = 7.5 mΩ |
| VBAT (BOOST INPUT) = 5 V | fSW = 200 kHz | |
| VIN (BOOST OUTPUT) = 10 V | L = 1 µH | |
| CIN = 440 µF | COUT = 660 µF | RSENSE = 7.5 mΩ |
| VIN = 12 V | L= 4.7 µH | fSW = 400 kHz |
| VOUT = 5 V | RSENSE = 10 Ω |
| VIN = 12 V | L= 4.7 µH | fSW = 400 kHz |
| VOUT = 5 V | RSENSE = 10 Ω |
| VBAT (BOOST INPUT) = 5 V | fSW = 200 kHz | |
| VIN (BOOST OUTPUT) = 10 V | L = 680 nH | |
| CIN = 440 µF | COUT = 660 µF | RSENSE = 10 mΩ |
| VIN (BOOST OUTPUT) = 10 V | fSW = 200 kHz | |
| BuckA = 5 V AT 1.5 A | CIN = 440 µF | L = 1 µH |
| BuckB = 3.3 V AT 3.5 A | COUT = 660 µF | RSENSE = 7.5 mΩ |