ZHCSHA3D NOVEMBER 2009 – March 2018 TPS40303 , TPS40304 , TPS40305
PRODUCTION DATA.
- 1 特性
- 2 應(yīng)用
- 3 說明
- 4 修訂歷史記錄
- 5 Pin Configuration and Functions
- 6 Specifications
- 7 Detailed Description
-
8 Application and Implementation
- 8.1 Application Information
- 8.2
Typical Applications
- 8.2.1
Using the TPS40305 for a 12-V to 1.8-V Point-of-Load Synchronous Buck Regulator
- 8.2.1.1 Design Requirements
- 8.2.1.2
Detailed Design Procedure
- 8.2.1.2.1 Custom Design With WEBENCH® Tools
- 8.2.1.2.2 Selecting the Switching Frequency
- 8.2.1.2.3 Inductor Selection (L1)
- 8.2.1.2.4 Output Capacitor Selection (C12)
- 8.2.1.2.5 Peak Current Rating of Inductor
- 8.2.1.2.6 Input Capacitor Selection (C8)
- 8.2.1.2.7 MOSFET Switch Selection (Q1 and Q2)
- 8.2.1.2.8 Bootstrap Capacitor (C6)
- 8.2.1.2.9 VDD Bypass Capacitor (C7)
- 8.2.1.2.10 BP Bypass Capacitor (C5)
- 8.2.1.2.11 Short-Circuit Protection (R11)
- 8.2.1.2.12 Feedback Divider (R4, R5)
- 8.2.1.2.13 Compensation: (C2, C3, C4, R3, R6)
- 8.2.1.3 Application Curves
- 8.2.2
A High-Current, Low-Voltage Design Using the TPS40304
- 8.2.2.1 Design Requirements
- 8.2.2.2
Detailed Design Procedure
- 8.2.2.2.1 Selecting the Switching Frequency
- 8.2.2.2.2 Inductor Selection (L1)
- 8.2.2.2.3 Output Capacitor Selection (C12)
- 8.2.2.2.4 Peak Current Rating of Inductor
- 8.2.2.2.5 Input Capacitor Selection (C8)
- 8.2.2.2.6 MOSFET Switch Selection (Q1 and Q2)
- 8.2.2.2.7 Bootstrap Capacitor (C6)
- 8.2.2.2.8 VDD Bypass Capacitor (C7)
- 8.2.2.2.9 BP Bypass Capacitor (C5)
- 8.2.2.2.10 Short-Circuit Protection (R11)
- 8.2.2.2.11 Feedback Divider (R4, R5)
- 8.2.2.2.12 Compensation: (C2, C3, C4, R3, R6)
- 8.2.2.3 Application Curves
- 8.2.3
A Synchronous Buck Application Using the TPS40303
- 8.2.3.1 Design Requirements
- 8.2.3.2
Detailed Design Procedure
- 8.2.3.2.1 Selecting the Switching Frequency
- 8.2.3.2.2 Inductor Selection (L1)
- 8.2.3.2.3 Output Capacitor Selection (C12)
- 8.2.3.2.4 Peak Current Rating of Inductor
- 8.2.3.2.5 Input Capacitor Selection (C8)
- 8.2.3.2.6 MOSFET Switch Selection (Q1 and Q2)
- 8.2.3.2.7 Bootstrap Capacitor (C6)
- 8.2.3.2.8 VDD Bypass Capacitor (C7)
- 8.2.3.2.9 BP Bypass Capacitor (C5)
- 8.2.3.2.10 Short-Circuit Protection (R11)
- 8.2.3.2.11 Feedback Divider (R4, R5)
- 8.2.3.2.12 Compensation: (C2, C3, C4, R3, R6)
- 8.2.3.3 Application Curves
- 8.2.1
Using the TPS40305 for a 12-V to 1.8-V Point-of-Load Synchronous Buck Regulator
- 9 Power Supply Recommendations
- 10Layout
- 11器件和文檔支持
- 12機械、封裝和可訂購信息
封裝選項
機械數(shù)據(jù) (封裝 | 引腳)
- DRC|10
散熱焊盤機械數(shù)據(jù) (封裝 | 引腳)
- DRC|10
訂購信息
8.2.3.2.9 BP Bypass Capacitor (C5)
Per the TPS40303 data sheet, a minimum 1.0-uF ceramic capacitance is required to stabilize the BP regulator. To limit regulator noise to less than 10 mV, the value of the bypass capacitor is calculated in Equation 47.
Equation 47. 
Because both Q1 and Q2’s are the same, total gate charge is 8.4 nC, a BP capacitor of 0.84 µF is calculated. A standard value of 1.0 uF is selected to limit noise on the BP regulator.