ZHCSE85A October 2015 – February 2024 TPS3710
PRODUCTION DATA
Figure 4-1 DDC Package
Figure 4-2 DSE Package| PIN | I/O | DESCRIPTION | ||
|---|---|---|---|---|
| NAME | DDC | DSE | ||
| GND | 2, 4, 6 | 1, 3, 5 | — | Connect all three pins to ground. |
| OUT | 1 | 6 | O | SENSE comparator open-drain output. OUT is driven low when the voltage at this comparator is below (VIT-). The output goes high when the sense voltage returns above the respective threshold (VIT+). |
| SENSE | 3 | 4 | I | This pin is connected to the voltage to be monitored with the use of an external resistor divider. When the voltage at this pin drops below the threshold voltage (VIT-), OUT is driven low. |
| VDD | 5 | 2 | I | Supply voltage input. Connect a 1.8V to 18V supply to VDD to power the device. Good analog design practice is to place a 0.1μF ceramic capacitor close to this pin. |