ZHCSA47E July 2012 – January 2018 TPS23751 , TPS23752
PRODUCTION DATA.
Voltage feed-forward compensation can provide additional benefits including a flatter output fold-back current limit characteristic (versus input voltage), and a reduction of voltage stress on the primary switching MOSFET at high line and output overload. Voltage feed-forward can simply be applied by adding a resistor, RVFF between VDD and CS as shown in Figure 32. The current through RVFF and RS provides a small dc offset on the CS pin which reduces the output fold back current limit.
A simple way to choose RVFF is to first determine the natural circuit output fold back current at minimum line input voltage. For example, if the circuit requirements are to deliver a regulated 5 V output at 5 A from a 24 V dc adapter, then low line input could be as low as 21.6 V including tolerance. RVFF must be set large enough to allow the required current to be delivered prior to output voltage fold back. Natural circuit output fold back current and primary MOSFET voltage stress should also be characterized at high line in order to assess the improvement provided by the addition of RVFF.
For a given SRT setpoint, the addition of RVFF reduces the output current at which the VFO to PWM (and PWM to VFO) transition occurs. This requires that the designer increase VSRT to account for the reduction due to RVFF.