ZHCSHY9 April 2018 TPS22810-Q1
PRODUCTION DATA.
9.2.2.3 Inrush Current
To determine how much inrush current is caused by the CL capacitor, use Equation 9.
where
- IINRUSH is the amount of inrush caused by CL
- CL is the capacitance on VOUT
- dt is the Output Voltage rise time during the ramp up of VOUT when the device is enabled
- dVOUT is the change in VOUT during the ramp up of VOUT when the device is enabled
The appropriate rise time can be calculated using the design requirements and the inrush current equation. When we calculate the rise time (measured from 10% to 90% of VOUT), we account for this in our dVOUT parameter (80% of VOUT = 9.6 V) shown in Equation 10 and Equation 11.
To ensure an inrush current of less than 400 mA, choose a CT value that yields a rise time of more than 528 μs. Consulting Table 2 at VIN = 12 V, CT = 4700 pF provides a typical rise time of 957 μs. Using this rise time and voltage into Equation 9, yields Equation 12 and Equation 13.
An appropriate CL value must be placed on VOUT such that the IMAX and IPLS specifications of the device are not violated.