ZHCS116G May   2011  – December 2015 TPD4S014

PRODUCTION DATA.  

1. 1 特性
2. 2 應(yīng)用范圍
3. 3 說明
4. 4 修訂歷史記錄
5. 5 Pin Configuration and Functions
6. 6 Specifications
   1. 6.1 Absolute Maximum Ratings
   2. 6.2 ESD Ratings
   3. 6.3 Recommended Operating Conditions
   4. 6.4 Thermal Information
   5. 6.5 Electrical Characteristics, EN, ACK, D+, D-, ID Pins
   6. 6.6 Electrical Characteristics OVP Circuits
   7. 6.7 Supply Current Consumption
   8. 6.8 Thermal Shutdown Feature
   9. 6.9 Typical Characteristics
7. 7 Detailed Description
   1. 7.1 Overview
   2. 7.2 Functional Block Diagram
   3. 7.3 Feature Description
      1. 7.3.1 Input Voltage Protection at VBUS up to 28 V DC
      2. 7.3.2 Low RON nFET Switch
      3. 7.3.3 ESD Performance D+/D-/ID/VBUS Pins
      4. 7.3.4 Overvoltage and Undervoltage Lockout Features
      5. 7.3.5 Capacitance TVS ESD Clamp for USB2.0 Hi-Speed Data Rate
      6. 7.3.6 Start-up Delay
      7. 7.3.7 OVP Glitch Immunity
      8. 7.3.8 Integrated Input Enable and Status Output Signal
      9. 7.3.9 Thermal Shutdown
   4. 7.4 Device Functional Modes
8. 8 Application and Implementation
   1. 8.1 Application Information
   2. 8.2 Typical Applications
      1. 8.2.1 For Non-OTG USB Systems
         1. 8.2.1.1 Design Requirements
         2. 8.2.1.2 Detailed Design Procedure
         3. 8.2.1.3 Application Curves
      2. 8.2.2 For OTG USB Systems
         1. 8.2.2.1 Design Requirements
         2. 8.2.2.2 Detailed Design Procedure
         3. 8.2.2.3 Application Curves
9. 9 Power Supply Recommendations
10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
11. 11器件和文檔支持
    1. 11.1 社區(qū)資源
    2. 11.2 商標
    3. 11.3 靜電放電警告
    4. 11.4 Glossary
12. 12機械、封裝和可訂購信息