ZHCSPX3A October 2022 – November 2022 TMUX7436F
PRODMIX
| PIN | TYPE(1) | DESCRIPTION | ||
|---|---|---|---|---|
| NAME | TSSOP | WQFN(2) | ||
| D1 | 3 | 1 | I/O | Drain pin 1. Can be an input or output. The drain pin is not overvoltage protected. |
| D2 | 11 | 9 | I/O | Drain pin 2. Can be an input or output. The drain pin is not overvoltage protected. |
| DR | 8 | 5 | I | Drain Response (DR) input. Tying the DR pin to GND enables the drain to be pulled to VDD or VSS through a 40 kΩ resistor during an overvoltage fault event. The drain pin becomes open circuit when the DR pin is a logic high or left floating. |
| EN | 14 | 12 | I | Active high logic enable (EN) pin, has internal 4 MΩ pull-down resistor. The device is disabled and all switches become high impedance when the pin is low. As provided in Table 8-1, when the pin is high, the SELx logic inputs determine individual switch states. |
| FF | 15 | 13 | O | General fault flag. This pin is an open drain output and is asserted low when overvoltage condition is detected on any of the source (Sxy) input pins. Connect this pin to an external supply (1.8 V to 5.5 V) through a 1 kΩ pull-up resistor. |
| GND | 6 | 4 | P | Ground (0 V) reference |
| N.C. | 7 | 7 | — | No internal connection. This pin can be shorted to GND or left floating. |
| S1A | 2 | 16 | I/O | Overvoltage protected source pin 1A. Can be an input or output. |
| S1B | 4 | 2 | I/O | Overvoltage protected source pin 1B. Can be an input or output. |
| S2A | 10 | 8 | I/O | Overvoltage protected source pin 2A. Can be an input or output. |
| S2B | 12 | 10 | I/O | Overvoltage protected source pin 2B. Can be an input or output. |
| SEL1 | 1 | 15 | I | Logic control input 1. |
| SEL2 | 9 | 6 | I | Logic control input 2. |
| SF | 16 | 14 | O |
Specific fault flag. This pin is an open drain output and is asserted low when an overvoltage condition is detected on a specific (Sxy) input pin, depending on the state of the SELx pins, as provided in Table 8-1. Connect this pin to an external supply (1.8 V to 5.5 V) through a 1 kΩ pull-up resistor. |
| VDD | 13 | 11 | P | Positive power supply. This pin is the most positive power-supply potential. Connect a decoupling capacitor ranging from 0.1 μF to 10 μF between VDD and GND for reliable operation. |
| VSS | 5 | 3 | P | Negative power supply. This pin is the most negative power-supply potential. This pin can be connected to ground in single-supply applications. Connect a decoupling capacitor ranging from 0.1 μF to 10 μF between VSS and GND for reliable operation. |
| Thermal Pad | — | The thermal pad is not connected internally. It is recommended to tie the pad to GND or VSS for best performance. | ||