Table 1. Design Parameters

8.2.2.1 Input and Output Capacitor Requirements

Generally, 1-µF X5R- and X7R-type ceramic capacitors are recommended because these capacitors have minimal variation in value and equivalent series resistance (ESR) over temperature.

However, the TLV742P is designed to be stable with an effective capacitance of 0.1 µF or larger at the output. As a result, the device is stable with capacitors of other dielectric types if the effective capacitance under operating bias voltage and temperature is greater than 0.1 µF. This effective capacitance refers to the capacitance that the LDO detects under operating bias voltage and temperature conditions; that is, the capacitance after taking bias voltage and temperature derating into consideration. In addition to using less expensive dielectrics, this stability with 0.1-µF effective capacitance enables the use of smaller footprint capacitors that have higher derating in size- and space-constrained applications.

Using a 0.1-µF rated capacitor at the output of the LDO does not ensure stability because the effective capacitance under the specified operating conditions is less than 0.1 µF. Maximum ESR must be less than
200 mΩ.

Although an input capacitor is not required for stability, good analog design practice is to connect a 0.1-µF to
1-µF, low ESR capacitor across the IN pin and GND pin of the regulator. This capacitor counteracts reactive input sources and improves transient response, noise rejection, and ripple rejection. A higher-value capacitor may be required if large, fast rise-time load transients are anticipated, or if the device is not located close to the power source. If source impedance is more than 2-Ω, a 0.1-µF input capacitor may be required to ensure stability.

8.2.2.2 Dropout Voltage

The TLV742P series of LDOs use a PMOS pass transistor to achieve low dropout. When (V_IN – V_OUT) is less than the dropout voltage (V_DO), the PMOS pass device is in the linear region of operation and the input-to-output resistance is the R_DS(ON) of the PMOS pass element. V_DO scales approximately with output current because the PMOS device functions similar to a resistor in dropout.

PSRR and transient response degrade when (V_IN – V_OUT) approaches dropout.

8.2.2.3 Transient Response

Increasing the size of the output capacitor reduces overshoot and undershoot magnitude but increases the duration of the transient response.