ZHCSE78A December   2011  – September 2015 TLV320AIC3262

PRODUCTION DATA.  

1. 1 特性
2. 2 應用范圍
3. 3 說明
4. 4 修訂歷史記錄
5. 5 說明 （續）
6. 6 Device Comparison Table
7. 7 Pin Configuration and Functions
8. 8 Specifications
   1. 8.1  Absolute Maximum Ratings
   2. 8.2  ESD Ratings
   3. 8.3  Recommended Operating Conditions
   4. 8.4  Thermal Information
   5. 8.5  Electrical Characteristics, SAR ADC
   6. 8.6  Electrical Characteristics, ADC
   7. 8.7  Electrical Characteristics, Bypass Outputs
   8. 8.8  Electrical Characteristics, Microphone Interface
   9. 8.9  Electrical Characteristics, Audio DAC Outputs
   10. 8.10 Electrical Characteristics, Class-D Outputs
   11. 8.11 Electrical Characteristics, Miscellaneous
   12. 8.12 Electrical Characteristics, Logic Levels
   13. 8.13 I2S/LJF/RJF Timing in Master Mode (see )
   14. 8.14 I2S/LJF/RJF Timing in Slave Mode (see )
   15. 8.15 DSP/Mono PCM Timing in Slave Mode (see )
   16. 8.16 I2C Interface Timing (see )
   17. 8.17 SPI Interface Timing
   18. 8.18 Dissipation Ratings
   19. 8.19 Typical Characteristics
       1. 8.19.1 Audio ADC Performance
       2. 8.19.2 Audio DAC Performance
       3. 8.19.3 Class-D Driver Performance
       4. 8.19.4 MICBIAS Performance
9. 9 Parameter Measurement Information
10. 10Detailed Description
    1. 10.1 Overview
    2. 10.2 Functional Block Diagram
    3. 10.3 Feature Description
       1. 10.3.1  Digital Pins
       2. 10.3.2  Analog Pins
       3. 10.3.3  Multifunction Pins
       4. 10.3.4  Analog Audio I/O
          1. 10.3.4.1  Analog Low Power Bypass
          2. 10.3.4.2  ADC Bypass Using Mixer Amplifiers
          3. 10.3.4.3  Headphone Outputs
          4. 10.3.4.4  Using the Headphone Amplifier
          5. 10.3.4.5  Ground-Centered Headphone Amplifier Configuration
          6. 10.3.4.6  Circuit Topology
          7. 10.3.4.7  Charge Pump Set-Up and Operation
          8. 10.3.4.8  Output Power Optimization
          9. 10.3.4.9  Offset Correction and Start-Up
          10. 10.3.4.10 Ground-Centered Headphone Setup
              1. 10.3.4.10.1 High Audio Output Power, High Performance Setup
              2. 10.3.4.10.2 High Audio Output Power, Low Power Consumption Setup
              3. 10.3.4.10.3 Medium Audio Output Power, High Performance Setup
              4. 10.3.4.10.4 Lowest Power Consumption, Medium Audio Output Power Setup
          11. 10.3.4.11 Stereo Unipolar Configuration
              1. 10.3.4.11.1 Circuit Topology
              2. 10.3.4.11.2 Unipolar Turn-On Transient (Pop) Reduction
          12. 10.3.4.12 Mono Differential DAC to Mono Differential Headphone Output
          13. 10.3.4.13 Stereo Line Outputs
          14. 10.3.4.14 Line Out Amplifier Configurations
          15. 10.3.4.15 Differential Receiver Output
          16. 10.3.4.16 Stereo Class-D Speaker Outputs
       5. 10.3.5  ADC / Digital Microphone Interface
          1. 10.3.5.1 ADC Processing Blocks - Overview
             1. 10.3.5.1.1 ADC Processing Blocks
       6. 10.3.6  DAC
          1. 10.3.6.1 DAC Processing Blocks — Overview
             1. 10.3.6.1.1 DAC Processing Blocks
       7. 10.3.7  Powertune
       8. 10.3.8  Clock Generation and PLL
       9. 10.3.9  Interfaces
          1. 10.3.9.1 Control Interfaces
             1. 10.3.9.1.1 I2C Control
             2. 10.3.9.1.2 SPI Control
          2. 10.3.9.2 Digital Audio Interfaces
          3. 10.3.9.3 miniDSP
             1. 10.3.9.3.1 miniDSP
             2. 10.3.9.3.2 Software
          4. 10.3.9.4 Asynchronous Sample Rate Conversion (ASRC)
       10. 10.3.10 Device Special Functions
       11. 10.3.11 Device Power Consumption
       12. 10.3.12 Powertune
       13. 10.3.13 Clock Generation and PLL
       14. 10.3.14 Interfaces
           1. 10.3.14.1 Control Interfaces
           2. 10.3.14.2 I2C Control
           3. 10.3.14.3 SPI Control
           4. 10.3.14.4 Digital Audio Interfaces
       15. 10.3.15 miniDSP
       16. 10.3.16 Device Special Functions
    4. 10.4 Device Functional Modes
       1. 10.4.1 Recording Mode
       2. 10.4.2 Playback Mode
       3. 10.4.3 Analog Low Power Bypass Modes
    5. 10.5 Register Maps
11. 11Application and Implementation
    1. 11.1 Application Information
    2. 11.2 Typical Application
       1. 11.2.1 Design Requirements
       2. 11.2.2 Detailed Design Procedure
          1. 11.2.2.1 Charge Pump Flying and Holding Capacitor
          2. 11.2.2.2 Reference Filtering Capacitor
          3. 11.2.2.3 MICBIAS
       3. 11.2.3 Application Curves
12. 12Power Supply Recommendations
    1. 12.1 Device Power Consumption
13. 13Layout
    1. 13.1 Layout Guidelines
    2. 13.2 Layout Examples
14. 14器件和文檔支持
    1. 14.1 文檔支持
       1. 14.1.1 相關文檔
    2. 14.2 社區資源
    3. 14.3 商標
    4. 14.4 靜電放電警告
    5. 14.5 Glossary
15. 15機械、封裝和可訂購信息