ZHCSOR2 August 2021 TLIN1039-Q1
PRODUCTION DATA
- 1 特性
- 2 應(yīng)用
- 3 說明
- 4 Revision History
- 5 說明（續(xù)）
- 6 Pin Configuration and Functions
- 7 Specifications
- 8 Parameter Measurement Information
-
9 Detailed Description
- 9.1 Overview
- 9.2 Functional Block Diagram
- 9.3
Feature Description
- 9.3.1 LIN (Local Interconnect Network) Bus
- 9.3.2 TXD (Transmit Input and Output)
- 9.3.3 RXD (Receive Output)
- 9.3.4 VSUP (Supply Voltage)
- 9.3.5 GND (Ground)
- 9.3.6 EN (Enable Input)
- 9.3.7 Protection Features
- 9.3.8 TXD Dominant Timeout (DTO)
- 9.3.9 Bus Stuck Dominant System Fault: False Wake-Up Lockout
- 9.3.10 Thermal Shutdown
- 9.3.11 Under Voltage on VSUP
- 9.3.12 Unpowered Transceiver
- 9.4 Functional Modes
- 10Application and Implementation
- 11Power Supply Recommendations
- 12Layout
- 13Device and Documentation Support
封裝選項
機(jī)械數(shù)據(jù) (封裝 | 引腳)
- DDF|8
散熱焊盤機(jī)械數(shù)據(jù) (封裝 | 引腳)
訂購信息
9.3.9 Bus Stuck Dominant System Fault: False Wake-Up Lockout
The TLIN1039-Q1 contains logic to detect bus stuck dominant system faults and prevents the device from waking up falsely during the system fault. Upon entering sleep mode, the device detects the state of the LIN bus. If the bus is dominant, the wake-up logic is locked out until a valid recessive on the bus “clears” the bus stuck dominant, preventing excessive current consumption. Figure 9-2 and Figure 9-3 show the behavior of this protection.
Figure 9-2 No Bus Fault: Entering Sleep Mode with Bus Recessive Condition and Wake-up
Figure 9-3 Bus Fault: Entering Sleep Mode with Bus Stuck
Dominant Fault, Clearing, and Wake-up