ZHCSKI2B November 2019 – May 2022 TLIN1028S-Q1
PRODUCTION DATA
Figure 8-1 Test System: Operating Voltage Range with RX and TX Access
Figure 8-2 RX Response: Operating Voltage Range
Figure 8-3 LIN Bus Input Signal
Figure 8-4 LIN Receiver Test with RX access
Figure 8-5 Test Circuit for IBUS_LIM at Dominant State (Driver on)
Figure 8-6 Test Circuit for IBUS_PAS_dom; TXD = Recessive State VBUS = 0 V
Figure 8-7 Test Circuit for IBUS_PAS_rec
Figure 8-8 Test Circuit for IBUS_NO_GND Loss of GND
Figure 8-9 Test Circuit for IBUS_NO_BAT Loss of Battery
Figure 8-10 Test Circuit Slope Control and Duty Cycle
Figure 8-11 Definition of Bus Timing
Figure 8-12 Propagation Delay Test Circuit
Figure 8-13 Propagation Delay
Figure 8-14 Mode Transitions
Figure 8-15 Wakeup Through EN
Figure 8-16 Wakeup through LIN
Figure 8-17 Test Circuit for AC Characteristics