ZHCSI07D April 2018 – June 2022 TLIN1024-Q1
PRODUCTION DATA
- 1 特性
- 2 應用
- 3 說明
- 4 Revision History
- 5 Pin Configuration and Functions
- 6 Specifications
-
7 Detailed Description
- 7.1 Overview
- 7.2 Functional Block Diagram
- 7.3
Feature Description
- 7.3.1 LIN (Local Interconnect Network) Bus
- 7.3.2 TXD (Transmit Input/Output)
- 7.3.3 RXD (Receive Output)
- 7.3.4 VSUP1/2 (Supply Voltage)
- 7.3.5 GND (Ground)
- 7.3.6 EN (Enable Input)
- 7.3.7 Protection Features
- 7.3.8 TXD Dominant Time Out (DTO)
- 7.3.9 Bus Stuck Dominant System Fault: False Wake Up Lockout
- 7.3.10 Thermal Shutdown
- 7.3.11 Under Voltage on VSUP
- 7.3.12 Unpowered Device and LIN Bus
- 7.4 Device Functional Modes
- 8 Application and Implementation
- 9 Device and Documentation Support
- 10Mechanical, Packaging, and Orderable Information
7 Parameter Measurement Information
Figure 7-1 Test System: Operating Voltage Range with RX and TX Access
Figure 7-2 RX Response: Operating Voltage Range
Figure 7-3 LIN Bus Input Signal
Figure 7-4 LIN Receiver Test with RX Access
Figure 7-5 VSUP_NON_OP
Figure 7-6 Test Circuit for IBUS_LIM at Dominant State (Driver on)
Figure 7-7 Test Circuit for IBUS_PAS_dom; TXD = Recessive State VBUS = 0 V
Figure 7-8 Test Circuit for IBUS_PAS_rec
Figure 7-9 Test Circuit for IBUS_NO_GND Loss of GND
Figure 7-10 Test Circuit for IBUS_NO_BAT Loss of Battery
Figure 7-11 Test Circuit Slope Control and Duty Cycle
Figure 7-12 Definition of Bus Timing Parameters
Figure 7-13 Propagation Delay Test Circuit
Figure 7-14 Propagation Delay
Figure 7-15 Mode Transitions
Figure 7-16 Wake Up Through EN
Figure 7-17 Wake Up Through LIN
Figure 7-18 Test Circuit for AC Characteristics