The device has two protection features that limit the short circuit current when a CAN bus line is short-circuit fault condition: driver current limiting (both dominant and recessive states) and TXD dominant state time out to prevent permanent higher short circuit current of the dominant state during a system fault. During CAN communication the bus switches between dominant and recessive states, thus the short circuit current may be viewed either as the instantaneous current during each bus state or as an average current of the two states. For system current (power supply) and power considerations in the termination resistors and common-mode choke ratings, use the average short circuit current. Determine the ratio of dominant and recessive bits by the data in the CAN frame plus the following factors of the protocol and PHY that force either recessive or dominant at certain times:

• Control fields with set bits
• Bit stuffing
• Interframe space
• TXD dominant time out (fault case limiting)

Where:

• I_OS(AVG) is the average short circuit current
• %Transmit is the percentage the node is transmitting CAN messages
• %Receive is the percentage the node is receiving CAN messages
• %REC_Bits is the percentage of recessive bits in the transmitted CAN messages
• %DOM_Bits is the percentage of dominant bits in the transmitted CAN messages
• I_{OS(SS)_REC} is the recessive steady state short circuit current
• I_{OS(SS)_DOM} is the dominant steady state short circuit current