ZHCSGC3E March 2016 – April 2021 TCAN1051H , TCAN1051HG , TCAN1051HGV , TCAN1051HV
PRODUCTION DATA
| PARAMETER | TEST CONDITIONS | MIN | TYP(1) | MAX | UNIT | ||
|---|---|---|---|---|---|---|---|
| Device Switching Characteristics | |||||||
| tPROP(LOOP1) | Total loop delay, driver input (TXD) to receiver output (RXD), recessive to dominant | See Figure 7-4, S = 0 V, RL = 60 ?, CL = 100 pF, CL(RXD) = 15 pF | 100 | 160 | ns | ||
| tPROP(LOOP2) | Total loop delay, driver input (TXD) to receiver output (RXD), dominant to recessive | 110 | 175 | ||||
| tMODE | Mode change time, from Normal to Silent or from Silent to Normal | See Figure 7-3 | 1 | 10 | μs | ||
| Driver Switching Characteristics | |||||||
| tpHR | Propagation delay time, high TXD to driver recessive (dominant to recessive) | See Figure 7-1, S = 0
V, RL = 60 ?, CL = 100 pF, RCM = open | 75 | ns | |||
| tpLD | Propagation delay time, low TXD to driver dominant (recessive to dominant) | 55 | |||||
| tsk(p) | Pulse skew (|tpHR - tpLD|) | 20 | |||||
| tR | Differential output signal rise time | 45 | |||||
| tF | Differential output signal fall time | 45 | |||||
| tTXD_DTO | Dominant timeout | See Figure 7-6, S = 0 V, RL = 60 ?, CL = open | 1.2 | 3.8 | ms | ||
| Receiver Switching Characteristics | |||||||
| tpRH | Propagation delay time, bus recessive input to high output (Dominant to Recessive) | See Figure 7-2, S = 0 V, CL(RXD) = 15 pF | 65 | ns | |||
| tpDL | Propagation delay time, bus dominant input to low output (Recessive to Dominant) | 50 | ns | ||||
| tR | RXD Output signal rise time | 10 | ns | ||||
| tF | RXD Output signal fall time | 10 | ns | ||||
| FD Timing Parameters | |||||||
| tBIT(BUS) | Bit time on CAN bus output pins with tBIT(TXD) = 500 ns, all devices | See Figure 7-5 , S = 0 V, RL = 60 ?, CL = 100 pF, CL(RXD) = 15 pF, ΔtREC = tBIT(RXD) - tBIT(BUS) | 435 | 530 | ns | ||
| Bit time on CAN bus output pins with tBIT(TXD) = 200 ns, G device variants only | 155 | 210 | |||||
| tBIT(RXD) | Bit time on RXD output pins with tBIT(TXD) = 500 ns, all devices | 400 | 550 | ||||
| Bit time on RXD output pins with tBIT(TXD) = 200 ns, G device variants only | 120 | 220 | |||||
| ΔtREC | Receiver timing symmetry with tBIT(TXD) = 500 ns, all devices | -65 | 40 | ||||
| Receiver timing symmetry with tBIT(TXD) = 200 ns, G device variants only | -45 | 15 | |||||